Allegro PCB Designer RAKs

Allegro Constraint Compiler

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Allegro Constraint Compiler: Workshop Learn more at Cadence Support Portal - https://support.cadence.com © 2019 Cadence Design Systems, Inc. All rights reserved w orldw ide. Page 6 The contents of this section include: Functional Overview Table and Specification Format Overview Mapping Name Table Object Table Rule Specification Table (Rule Sets) Object Rule Table (Object Rules) Object Rule Table (Class-to-Class Rules) User Interface and Data Query Validation and Apply Constraints to Design Reporting Functional Overview The power of ACC is the ability to leverage "data agnostic" constraints that can be developed once, validated, and then placed in a central library for future use in other designs. Knowing that all designs are not exactly alike (slightly different net names or component reference designators), ACC provides a Mapping table to correlate constraint and design-specific information. As part of the process, a standard Constraint Manager difference report will be generated to review the changes that will be made to the design. Like other Constraint Manager import functions, the compiler can be running in Validation mode (Report only) or Apply mode to incorporate the changes to the design with compiler options to merge or replace existing constraints.

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