Issue link: https://resources.pcb.cadence.com/i/1180070
Allegro Constraint Compiler: Workshop Learn more at Cadence Support Portal - https://support.cadence.com © 2019 Cadence Design Systems, Inc. All rights reserved w orldw ide. Page 41 9. Save the changes; then select File > Save As to save the spreadsheet in CSV format under the same filename using the file type CSV (Comma delimited) (.csv). 10. Open Constraint Manager and select Tools > Constraint Compiler. 11. Expand the acc_library folder and select Lab-2_Virtex-5_to_Virtex-7. 12. Click the Load Selected Files button and then click the Next button. 13. Select the Validate button to generate a Constraint Compiler report. 14. Navigate the report to see what will be updated in the design and compare it to the table entries you created. 15. Click the Apply Constraints to Design button to load the constraints. 16. Click the Close button to close the Compiler and review the results in Constraint Manager. 17. Lab Complete; do not save this design.