Issue link: https://resources.pcb.cadence.com/i/1149719
© 2019 Cadence Design Systems, Inc. All rights reserved. Chip Production Silicon Bringup Post Si Fab Architecture Exploration & Spec Definition Phase SoC Development More Robust Hardware and Software! Greatly accelerated Time-to-Market! Test 100s of SW Scenarios Before Tape Out! Cadence Emulation Chamber SoC User SoC Developer FPGA Prototyping (Tens of users) Virtual System Platform (Hundreds of users) SW development starts 6-9 month earlier, Silicon bring up time greatly accelerated! System on Chip Silicon Bringup Post Si Applications (Basic to Complex) Bare-metal SW OS and Drivers (Linux, Android) Middleware (Graphics, Audio)