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The IC Packaging Process

Key Takeaways

  • Wafer fabrication creates the die, which is the heart of an IC.

  • The encapsulation of the die creates a discrete IC.

  • The attributes of different packages and how the layout can leverage them.

IC packaging process

The IC packaging process results in ICs of various shapes and sizes

If good things come in small packages, chip manufacturers have taken that to the logical extreme: better things come in smaller packages. The general tendency of electronics over time is smaller sizes with improved performance, and advancements in manufacturing technology have reduced systems that used to take up entire rooms into portable devices. 

For engineers, it’s not merely as simple as choosing the smallest part available, however. Like all things in product development, there are tradeoffs to consider such as cost, reliability, thermal performance, and more. Depending on the goals of the final product, the exact IC packaging process will adapt to improve the suitability of the final product to its design intent.

IC Packaging Types



Surface Mount Technology (SMT)

For the same component, a smaller size than through-hole packaging allows for denser assemblies

A good trade-off between device ruggedness (shock/vibration) and appropriateness for high-volume production

Manual soldering is slow and imprecise compared to through-hole packaging

Through-Hole (TH)

Appreciable size allows for manual soldering for prototyping and proof-of-concept boards

TH pins can provide better mechanical support for large package devices

Requires the most land pattern and clearance space of the IC technologies

Chip Scale

Even smaller than SMT (packages down to 120% of chip size) can reduce land pattern space requirements and weight by 95%

Elimination of bond wires reduces parasitics and improves signal speeds

Short connections have low ductility and can crack if there is a mismatch in coefficients of thermal expansion (CTE) between the board and device

Module Assembly

An assembly containing multiple identical or different chips on a unified die that can improve electrical and thermal performance

Novel chip assemblies allow for the utilization of three-dimensional space

Availability of unpacked die and testing of module can pose issues during system-level assembly

Wafer Fabrication: Preparing the Die

The manufacture of any IC begins with the silicon wafer. In a series of steps similar to the preparation of the bare board during PCB fabrication, a photoresist is carefully placed on the wafer to protect the desired underlying semiconductor before etching away any excess. From there, the manufacturing diverges:

water fabrication

Assembly for IC Packaging Processes

It’s difficult to succinctly summarize the IC packaging process, as it is in part defined by the package type itself. This shouldn’t be too surprising – form follows function after all – but the extensive list of IC packages means there can be significant process departure between devices. Most generally, an IC assembly will include:

  • Molding - Provides encapsulation to the IC. Different materials offer performance and cost tradeoffs depending on the needs of assembly and individual component quality:

    1. Plastics - Plastics are the most common mold for cost purposes. The body is hygroscopic, and rapid temperature swings without a pre-bake to harmlessly vaporize any moisture can lead to catastrophic failure of the device that is similar to an outgassing of the board. This hygroscopic nature also renders plastic body ICs more vulnerable to corrosion and contaminant ingress.

    2. Ceramics - Better suited for high-performance and reliability applications than plastics due to the hermetic sealing of the body. Ceramics in general possess excellent insulation properties combined with high thermal conductivities; this translates to greater resilience to temperature cycling and longer service life.

    3. Metals - The highest level of hermetic sealing available as well as extended temperature range usage for particularly demanding environments.

  • Marking - Used to add emblems, logos, characters, font, MPN, etc. to the body of the component for identification.

  • DTFS - Short for deflash, trim, form, and singulation.

    1. Deflash - Clean up any excess plastic material remaining after molding.

    2. Trim - Cut the dambar, which is used to mechanically support lead against one another during manufacturing to remove electrical shorts.

    3. Form - Manipulate the leads into the final shape and positions necessary for correct interface with the land pattern, excellent solder bond formation, etc.

    4. Singulation - Similar to routing a PCB from the panel, this removes individual ICs from the lead frame.

  • Lead finish - Apply a metal plate or coat for the leads that defends against corrosion and abrasion that can affect the integrity of a solder joint.

From here, components head to testing to verify functionality and performance. Just as with a PCB, devices must be assured of operation within taxing environments. Burn-in testing will be used to remove any infant mortality chips from the production run, but in doing so introduces some amount of aging to the IC. It’s critical that burn-in testing occurs at the minimum rate for defect detection, as any additional time spent within the process can reduce the service life, affecting the reliability of the PCBA.

IC Package Footprint

The result of the lengthy IC manufacturing process is a discrete component that may be available in multiple packages to support different system-level integrations. Different packages also may emphasize certain attributes of the component:

  • The most compact package would be favored in high-density placements. Per-unit costs may increase and thermal performance may decrease compared to larger packages.
  • Larger leads or a thermal tab will increase the size of the land pattern but offer superior thermal routing.
  • SMD and through-hole packages will require entirely different methods of solder application to attach to the board. SMD is preferred in dense designs due to the small size and greater routing space, as through-hole components require drilled holes for lead placement. There are many cases, however, where through-hole technology is of greater benefit to designers, such as during prototyping and small-batch, low-tech runs that utilize hand soldering.

A good design will allow for some wiggle room with a component choice such that the unavailability of a particular package does not upend production. At the same time, a heavily constrained board can benefit greatly from component selection that optimizes space, performance, and function.

Cadence Supports Designers With Industry-Leading Analysis Tools

The IC packaging process, like most things electronic, is a complex and intricate production. While PCB designers are usually a level of abstraction above component design and manufacturing, understanding the advantages and disadvantages of different die integrations and packages can enhance the performance of the PCB. 

Before committing to a BOM, engineers will want to examine how IC selection impacts their design instead of automatically searching out the smallest footprint or the cheapest package. Cadence’s Allegro X Advanced Package Designer offers complete package implementation capabilities to help you make strategic tradeoffs earlier and with greater confidence.

Leading electronics providers rely on Cadence products to optimize power, space, and energy needs for a wide variety of market applications. To learn more about our innovative solutions, talk to our team of experts.