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To Design for PCB Manufacturability

Greetings board designers! I’m going to begin the new year with a series of stories under the DFx umbrella. Like other umbrellas, I’ll break this one too. First up is Design for Manufacturability so here goes. We get to the DFM cycle with a level of optimism that we’ve covered the eventualities in the fab notes and complete artwork and other documentation down to the readme.doc file.

It doesn’t always work that way, particularly when more than one vendor is involved.

The goal of a good documentation package is that it is complete and coherent enough to proceed with the job without any explanations, waivers, errata or feedback of any kind. It doesn’t always work that way, particularly when more than one vendor is involved. The fab drawing is more of a baseline from which they will all deviate in one degree or another. Even using the same vendor all the time is no guarantee that the DFM data comes back immaculate.

The foundational aspect of PCB fabrication is a plausible photo-tool. That final imagery is derived from the artwork that you sent their way. What we know as global micro editing is where the photo-tool is crafted from the ECAD data. The artwork is more like a starting point.

Etch Compensation - Pre-Distorting the Artwork 

The first item on the CAM operator’s list is dealing with etch compensation. The traces and other geometry that appear on the board are what’s left behind after the etch process. First they have to drill and plate the holes with copper. That’s done prior to etching and adds a measure of copper to the entire panel. Only then do they mask off the circuit pattern that is not to be removed.

This means that the amount of copper that has to be etched away is a total of the beginning copper and whatever is added during via plating. You’ll see that outer layers tend to have more copper than inner layers. The exact amount of copper required in the barrel is often a technical question from the fab shop. Literally everything else flows from that number.

Figure 1. Image Credit: Author - A showcase board that Sanmina had in their booth for years after it was produced. It’s a heavy copper board with controlled depth slots and special patented vias along the slot edges. Five meetings came before tape-out on this radio board.

Once the via plating deviation is approved, they can figure out how much to alter the photo resist so that the end result comes out similar to what the artwork provided in the first place. The tendency is to make the tooling wider than the original to account for the profile of the trace as the chemistry forms the air gap. On balance, a narrow line is easier to etch than an equally narrow air gap.

Stack-Up Tolerances: It’s Not a Perfect World

The actual routing area on a board is slightly less than the board outline. The no man’s land allows for the random variation in the process. Every aspect of the board is ruled by some kind of tolerance. It’s up to you to decide whether to believe the component data sheet of the fab shop’s technology roadmap. You’re likely the only one aware of some of these routine decisions.

You also have to be a filter for requests that are out of touch with the fabrication limitations. It’s true that you can suppress the capture pads on layers where they do not connect. For Class 1 and 2 boards, the drill can cut a hole extending beyond the diameter of the “unused” pad. As much as 25% of the hole’s diameter can wander outside the edge of the pad on any given layer and still meet IPC Class 2 specifications. Deleting those unconnected pads does not mean that the clearance (anti-pad) can be reduced.

Figure 2. Image Credit: Sierra Circuits - The brown circle indicates the maximum overlap of the hole and the edge of the capture pad for Class 2 boards.

The case of sequentially stacking microvias to solve High Density Interconnect (HDI) layouts is different in that all layers will usually plate up. Button plating is more likely to be found when creating flex circuits. The laser vias are ablated then plated one layer at a time in any case. The smaller via geometry only emphasizes the positional differences from layer to layer. Good thing lasers retain their edge and precision all day long.

The important metric becomes the aspect ratio of the via. They can make a deep and narrow hole with a laser, just can’t plate it unless it’s shallow. By shallow, take it to mean a hole that is wider than it is deep. Thin dielectrics are required to achieve the full potential of HDI technology. A byproduct of that is the calculated line width for controlled impedance gets narrower as you go to the thinnest dielectric materials.

A Larger Annular Ring Is the #1 Thing You Can Give Your Fabrication Vendor

One of the key differences between Class 2 and Class 3 boards is the allowance of the break-out of the drill on Class 2 where Class 3 maintains a complete annular ring. The whole process of piling one layer above the next gets easier as the pad size increases relative to the hole size. The drill pattern repeats with the same precision as long as the bit is sharp.

The artwork also aligns over the entire stack with random misregistration. The repeatability of the tooling holes vs. the tooling pins govern the stackup uniformity. Every panel is unique in its imperfections. No matter the class, larger capture pads lead to more robust printed circuit boards.

It’s Harder to Prevent Things You Can’t See

Just like screen printing T-shirts, one color is easy where multiple colors (layers) increase the chances of misalignment. Thus the soldermask openings benefit from expansion over the size of the copper pad, typically 50 microns all around. The edge of the mask opening should then see another 75 microns before any silkscreen is applied. Using a line width of zero for the silkscreen will make it harder to judge if the edge of the line avoids the edge of the mask opening.

  Making it producible is entirely in your hands

Think of the layout as a digital twin of the fabricated board. Think of how small bits of a screen printed T-shirt flake off in the wash. Avoid using a period or other tiny bits of punctuation. As you do get smaller and smaller with the silkscreen features, a circle becomes better than a cross as both become a little blob of ink at a certain point. Soldermask also has a minimum feature size before it becomes a sliver that will not adhere to the board.

Part of the DFM ethos is to keep prices down. In the bigger picture, cutting costs on a bare board only to have it fail in assembly, test or in the user’s hands is sequentially worse. Size matters to most marketing teams so you have to find the balance. Some boards may require laser printing, others may get away with no silkscreen at all.

The bare board is the foundation of the end product. The product can only be as good as the underlying printed circuit board. Making it producible is entirely in your hands. The penalty for failure can be severe in terms of the company’s results. When someone asks for a feature that is not manufacturable, then it’s up to you to speak for the fabricator. You’re the advocate for the board and that fits with the fact that it’s your name at the top of the list in the title block. Own it.

About the Author

John Burkhert Jr is a career PCB Designer experienced in Military, Telecom, Consumer Hardware and lately, the Automotive industry. Originally, an RF specialist -- compelled to flip the bit now and then to fill the need for high-speed digital design. John enjoys playing bass and racing bikes when he's not writing about or performing PCB layout. You can find John on LinkedIn.

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