Alternating Current to Direct Current Converter Operation

A 65 W Flyback Design Walkthrough from Rectification to Regulation

Introduction

Converting AC power into a usable DC supply is a fundamental requirement in electronic systems. However, the behavior of a real AC to DC converter is shaped as much by non-ideal effects as by its topology. In practice, voltage levels, current waveforms, and component stress are all determined by how energy is processed through each stage of the converter.

Rather than treating converting AC to DC as a sequence of isolated blocks, this blog examines how those stages interact using a 65 W offline flyback as a reference design. The focus is on how design decisions made early in the process influence electrical performance, thermal behavior, and EMI.

The discussion begins at the point where most designs are effectively defined: the DC bus being established immediately after rectification.

Designing from the Input: Establishing the DC Bus

When you begin designing an offline power converter, the first number that matters is not the output voltage or even the topology. It is the DC voltage that will exist immediately after rectification as part of AC to DC conversion.

For a 120 VAC input, the peak of the rectified voltage is approximately 170 V. Accounting for typical line variation (±10%), this peak can rise to ~187 V. With additional margin for tolerances and transient conditions, designers generally treat this as a ~200 V class high voltage bus.

This decision immediately defines the electrical environment of the primary side. Bulk capacitors are typically rated at 200 V or higher, with capacitance values commonly in the 100 to 220 µF range for a ~65 W DC converter. The primary switching device must tolerate this bus voltage plus transient overshoot, which is why 600 to 700 V MOSFETs are standard in offline flyback converters.

PCB layout must also satisfy creepage and clearance requirements for circuits connected directly to AC mains voltage (the primary side), which directly constrains component placement and routing.

Before regulation is even considered, the system has already committed to a high voltage operating domain with real physical implications, even though the resulting voltage DC is still unregulated and directly tied to the alternating current AC input.

Figure 1: Generic AC to DC conversion block diagram showing rectification, bulk energy storage, and regulated output stages. Example analysis in this article assumes a 120 VAC input condition.

Rectification: Where Current Behavior Stops Being Intuitive

The bridge rectifier, implemented with diode devices, converts alternating current AC into a full-wave rectified waveform, producing pulsating DC that follows the absolute value of the input sine wave. At this stage, voltage behavior is still relatively intuitive, but current behavior changes significantly once a bulk capacitor is introduced.

With a capacitor connected to the rectifier output, conduction no longer occurs over the full cycle. Instead, current flows only when the instantaneous AC voltage exceeds the capacitor voltage. Because the capacitor holds charge near the peak of the waveform, this condition is met only for a short interval around each peak. The result is a highly non-linear input current waveform consisting of narrow, high-amplitude pulses.

The conduction angle depends on load and capacitance, but in typical offline converters it is significantly less than half the cycle and often falls in the ~20 to 60° range. For a 65 W converter operating at ~80 to 85% efficiency, the average input current at 120 VAC is roughly 0.6 to 0.7 A, while peak currents during conduction commonly reach 2 to 4 A.

This distinction between average, peak, and RMS current is critical for design. While average current determines input power, thermal stress in the rectifier is driven by RMS current and forward voltage drop. In practice, RMS current through the diodes can be on the order of 1.5 to 2 times the average current depending on conduction angle. This is why bridge rectifiers in the 50 to 100 W range are often sized conservatively, even when average current appears modest.

The pulsed nature of this current introduces significant harmonic content into the input waveform. These harmonics are a primary source of conducted EMI beginning at relatively low frequencies and extending into the switching range. As a result, EMI considerations begin at the rectifier stage, not just in the high frequency switching portion of the converter.

From a system perspective, rectification is not just a voltage conversion step. It defines how current is drawn from the AC source, sets the stress profile for the bulk capacitor and diodes, and establishes the conditions that the rest of the converter must operate within.

Bulk Energy Storage: Stabilizing Voltage While Increasing Stress

The bulk capacitor serves as the primary energy reservoir in an AC to DC converter, allowing the DC power supply to deliver continuous power to the load between the short charging intervals defined by the rectifier. Once the AC voltage is rectified into pulsating DC, the capacitor charges near the peaks of the waveform and discharges into the load for the remainder of the cycle. In effect, it converts a discontinuous input into a more stable DC bus, though one that still contains low-frequency ripple.

A first-order estimate shows that in a ~65 W design, a 100 µF capacitor can produce on the order of 30 to 40 V of ripple at 120 Hz, while increasing capacitance to ~220 µF reduces that ripple to roughly 15 to 25 V. These values are consistent with typical offline converter behavior and define how close the system is to a stable DC operating condition.

This improvement is not free. Increasing capacitance reduces ripple amplitude, but it also narrows the conduction interval during which the capacitor is recharged. As a result, peak charging current through the rectifier increases, and the harmonic content of the input current waveform rises. In practice, peak current can increase significantly even when average input power remains unchanged.

This creates a fundamental design tradeoff. Lower ripple improves regulation margin and reduces stress on the downstream converter, but higher peak and RMS currents increase thermal stress in the rectifier and contribute to conducted EMI. For this reason, designers typically target DC bus ripple in the range of roughly 20 to 30% of the peak voltage. Below this range, the incremental benefit to regulation diminishes while electrical and thermal stress continues to increase.

The capacitor’s ripple current rating becomes a key constraint in this operating regime. In a 65 W supply, RMS ripple currents are commonly in the range of ~0.5 to 1.5 A depending on operating conditions. This ripple current produces internal heating proportional to the capacitor’s ESR, which directly impacts reliability and lifetime. Capacitors operating near ~90°C experience significantly reduced lifetime, and in practice, gradual ESR increase is often first observed as growing DC bus ripple before eventual failure.

From a system perspective, the bulk capacitor does more than smooth voltage. It shapes input current, influences EMI performance, and defines the operating margin of the entire converter. Its selection is therefore not just a matter of capacitance value, but a balance between electrical performance, thermal limits, and long-term reliability.

Regulation: Breaking the Link to the Input Waveform

After rectification and bulk storage, the DC bus still reflects line variation and contains substantial low frequency ripple. Voltage regulation is required to produce a stable dc output suitable for downstream electronic devices.

In a typical 65 W design operating in discontinuous conduction mode (DCM), a flyback topology is commonly used. Energy is stored in the transformer magnetizing inductance during the switch on time and delivered to the output during the off time, with a feedback loop controlling duty cycle.

The key shift is that energy transfer is no longer tied to the 120 Hz ripple of the rectified input. Instead, it occurs at switching frequencies typically in the range of 50 to 150 kHz. This allows the DC output to remain stable even as the input varies, provided the minimum DC bus voltage remains above the converter’s required operating threshold.

In practice, excessive DC bus ripple reduces this margin. Under low line and high load conditions, the converter may approach its maximum duty cycle, increasing stress on the switching device and transformer while reducing regulation headroom. This coupling between bulk capacitance and control behavior is often only fully appreciated during initial hardware validation.

Figure 2: Flyback AC to DC converter circuit illustrating energy storage in the transformer during MOSFET on-time and transfer to the secondary during off-time, with output rectification and feedback control.

Switching Behavior: Where Layout Becomes Part of the Circuit

At switching frequencies, parasitic elements dominate behavior. The primary switching loop, consisting of the MOSFET, transformer primary, and return path, carries current with high di/dt. Even small parasitic inductances can produce voltage overshoot and ringing that are immediately visible at the switching node. Even a few nanohenries of parasitic inductance can generate tens of volts of overshoot at high di/dt.

In a well optimized design, this ringing is controlled to a modest fraction of the DC bus voltage. When overshoot approaches or exceeds roughly 20 to 30% of the bus, it is often a sign that loop inductance is too high or that damping is insufficient. This not only increases device stress but also becomes a significant source of EMI that can corrupt the DC output, often extending beyond the ~150 kHz to 1 MHz range depending on switching edge rates.

This is also where one of the most common first pass failures appear. A converter that performs correctly from a voltage regulation standpoint may still fail EMI testing, typically in the range of a few hundred kilohertz to around a megahertz. When probed, the switching node often shows high frequency ringing superimposed on the expected waveform. At the same time, measuring across the bulk capacitor can reveal sharp current spikes corresponding to the rectifier charging events.

What becomes clear in this situation is that the issue is not the control scheme or component selection in isolation, but the interaction between the switching loop and the input energy storage loop. Excess loop area in either path allows high di/dt currents to generate voltage transients that couple into the rest of the system. Reducing the physical loop area, tightening the placement of the switching components, or improving the return path often produces a more significant improvement than changing active components.

This is why two converters with identical schematics can behave very differently in practice. At these frequencies, the PCB layout is part of the circuit.

Figure 3: AC to DC flyback converter circuit diagram showing rectified high voltage input, primary MOSFET switching, transformer-based energy storage and transfer, and secondary rectification with output filtering. A feedback loop using an optocoupler regulates the DC output, while primary-side snubber circuitry limits voltage overshoot from leakage inductance.

Where Designs Actually Fail: Interaction Between Stages

Each stage of the DC converter performs a defined function, but real failures occur in the interactions between them.

In practice, these issues typically emerge during initial prototype testing, where elevated rectifier temperatures are driven by underestimated RMS current, EMI peaks in the ~150 kHz to 1 MHz range are caused by high di/dt switching and pulsed input current, and capacitor aging is accelerated by excessive ripple current and thermal stress.

Increasing bulk capacitance reduces ripple but increases peak current and EMI, while faster switching edges can improve efficiency but exacerbate both radiated and conducted emissions. At the same time, the pulsed input current interacts with EMI filters and layout parasitics in ways that are difficult to predict without direct measurement.

From Understanding to Implementation: Designing It on a PCB

Translating this behavior into a working design requires controlling current paths at the PCB level. The rectifier and bulk capacitor form a high current charging loop that should be kept physically compact. The primary switching loop must be minimized to reduce inductance and contain noise. Return paths must be clearly defined to prevent coupling into sensitive circuits.

At the same time, high voltage spacing constraints must be enforced, creating a constant tradeoff between safety and electrical performance.

This is where a platform like Cadence Allegro X PCB Platform becomes essential. Constraint driven design allows engineers to define electrical, thermal, and spacing requirements upfront and enforce them during layout. For power conversion circuits, this integration between schematic intent and physical implementation is critical to achieving predictable and repeatable performance.

Conclusion

An AC to DC conversion system works by progressively removing the constraints imposed by the input waveform. Rectification converts alternating current AC into pulsating DC, bulk energy storage stabilizes the supply using stored energy, and voltage regulation produces a controlled DC output.

What ultimately determines success is not whether each stage functions independently, but how effectively their interactions are managed across electrical, thermal, and physical domains. In practice, most failures are not due to incorrect topology, but to underestimating current behavior, ripple effects, and layout dependent parasitics.

That is why power converter design does not end at the schematic. It is completed in the layout, where theoretical performance is either preserved or compromised.