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EMI Reduction Techniques for Switching Power Supply PCB Layouts

A switching power supply works by turning a transistor on and off at high frequency, usually somewhere between hundreds of kilohertz and several megahertz. Every time that transistor switches, current changes very fast in the circuit around it. Fast current changes (high di/dt) flowing through parasitic inductance generate voltage transients and create rapidly changing electromagnetic fields. These fields can couple into nearby structures and become a source of radiated emissions.

 

Figure 1. Voltage spikes from a step-down converter at the primary of the inductor

You cannot eliminate the switching. That is how the converter works. What you can do is shrink the loops carrying the switching current so that the radiating area is small. While other factors also contribute to EMI, reducing loop area is often the single most important layout technique for controlling emissions in switching power supplies.

What "Hot Loop" Means

In a buck converter (the most common DC-DC topology), the highest-di/dt current flows through three components arranged in a loop: the input capacitor, the high-side switch, and the low-side switch (or diode). .

 

Figure 2. Step-down converter showing the Hot Loop

When the high-side switch turns on, current flows from the input capacitor, Cin, through the high-side switch and into the inductor. When the switch turns off, that current rapidly transfers to the low-side switch (or diode). These rapid current-path transitions create high di/dt switching loops that generate voltage transients and radiated emissions.

This is the "hot loop." It is the small triangle of components and copper carrying the switching current. The smaller you make this loop, the less inductance it has , the less voltage spike it generates, and the less it radiates.

Texas Instruments, Analog Devices, and other regulator vendors publish reference layouts for their parts showing exactly where to place each component to minimize the hot loop. If you are using a specific converter, the vendor application note are your most reliable references.

Four Layout Decisions That Shrink the Loop

There are at least four PCB layout decisions you can make to reduce the hot loop and minimize radiated EMI and noise. Let’s examine a few of these decisions as they are shown in the image below.

 

Figure 3. Allegro X PCB Layout view of a switching converter region with the hot loop visible.

1.Place the input capacitor as close to the switch as physically possible. The input capacitor supplies the current that the high-side switch demands every time it turns on. The path from the input capacitor's positive terminal, through the switch, to ground, and back to the input capacitor's negative terminal is the hot loop. Every millimeter of trace or via in that path adds inductance . Place the input capacitor directly adjacent to the switch package, with the shortest possible connections. This is the single most important EMI decision in a switching converter layout.

 

Figure 4. Allegro X PCB Layout view of the second layer in a 4-layer PCB. Solid Ground plane

2. Use a continuous ground plane directly underneath the converter. At switching frequencies, return current naturally follows the path of lowest impedance, typically directly beneath the outgoing current path. If the ground plane below the converter is broken, slotted, or interrupted, those discontinuities force the return current to detour. The detour increases loop area, which increases both EMI and voltage transients caused by parasitic inductance. A solid, continuous ground plane on the layer immediately below the converter is therefore essential for high-frequency performance.

3. Keep the switch node small. The switch node is the trace connecting the high-side switch, the low-side switch (or diode), and the inductor. The voltage on this node swings between the input voltage and ground (or below ground, briefly) every switching cycle. The faster the edges, the more high-frequency energy this node radiates. Make this trace just wide enough to handle the current. Do not extend it. Do not pour copper to "help with thermal" unless you genuinely need the thermal mass, because every extra square millimeter of switch node copper is an antenna .

4. Place the output capacitor close to the inductor. The output capacitor handles the ripple current from the inductor. The loop from inductor to output capacitor to ground and back is the second hot loop in the design. Same principle as the input loop: short connections, continuous ground plane underneath, minimal trace area.

Filtering Conducted Emissions at the Input

Hot loop control handles radiated emissions. Conducted emissions (noise traveling out through the input cables to the wider system) need additional filtering at the input. Sierra Circuits recommends a ferrite core inductor in series with the input rail, which acts as a high-impedance element at high frequency while passing DC. Combined with a bulk capacitor to ground, this forms a low-pass filter that knocks down the conducted noise heading back upstream .

The placement of this filter matters as much as the components themselves. Place the filter between the switching converter and the connector or cable that brings power onto the board. Filter elements upstream of the converter only help if no high-frequency noise paths bypass them.

Where to Place the Converter on the Board

The switching converter is often one of the noisiest circuits on a board. Whenever practical, place it near the power entry region or near the load it serves while maintaining adequate separation from sensitive analog circuitry, clock oscillators, and high-speed serial interfaces. Distance is often the simplest and most effective form of isolation.  The August blog on power distribution noise will go deeper into placement strategy.

How to Verify in Layout

Reducing EMI is not just about following layout guidelines. It is also important to verify that waves are propagating where you expect it to flow. Small changes in component placement, via locations, or plane structure can significantly affect loop inductance and return-current behavior.

Sigrity X Aurora reads the routed Allegro X PCB Layout database directly and provides several analysis workflows that help identify potential EMI risks before fabrication:

  • Power Integrity Analysis allows designers to evaluate power distribution network (PDN) impedance versus frequency. Excessive impedance peaks can contribute to switching noise, ringing, and power-supply instability.
  • Return Path Analysis identifies regions where current must detour around plane splits, voids, or discontinuities. These detours increase loop area and can increase both EMI and voltage transients.
  • Current Density Visualization shows how current flows through copper planes, vias, and traces. This makes it easier to identify unexpected current concentrations, bottlenecks, or return-current paths that may contribute to noise generation.
  • Via and Plane Transition Review helps identify locations where switching current must pass through unnecessary vias or fragmented copper regions, increasing parasitic inductance within critical current loops.

Verifying these behaviors before fabrication helps ensure that the final layout maintains short current loops, continuous return paths, and low-inductance power delivery—all key factors in reducing EMI from switching converters.

 

Figure 5. PowerDC PDN impedance plot showing actual impedance across frequency. After placing capacitors it is important to verify overall impedance

What the Compliance Chamber Sees

If your hot loop is small, your input filter is placed correctly, and your ground plane is continuous, your converter sounds like background hiss to the chamber. If any of those is wrong, your converter sounds like a transmitter at the switching frequency and every harmonic up through a few hundred megahertz. Same circuit, same components, different layout. The chamber report tells you which one you built.

About the Author

Kirsch Mackey is an electrical engineer, educator, and content creator with over 15 years of experience spanning power systems, control systems, electrical systems, embedded programming, PCB design, power electronics, and high-speed digital systems. As founder of HaSofu and former adjunct professor, he developed the MESH method—a structured approach to high-speed PCB design that has helped students land roles at companies like Apple, Intel, Cisco, Garmin and Amazon in months rather than years. Drawing from industry experience at Intel and beyond, Kirsch bridges theory and practice through technical writing, courses, and hands-on workshops that make complex engineering concepts accessible and actionable.

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