Die-Stacking Process

Key Takeaways

• The die-stacking process is a commonly used assembly technique in integrated circuit technology used to increase the density of devices per package. 

• Stacked-die chip packages consume less power than single-die packages. 

• The cost of stacked-die chip packages is less than single-die chip packages. 

In industrial and commercial applications, it is beneficial if a single chip package can deliver multiple functions. An integrated circuit packaging process called the die-stacking process allows the integration of multiple ICs into a single package. The die-stacking process is the technique used for integrating maximum device functionalities into a single chip, which helps cut costs and save space in circuit boards, especially in mobile phones and other pocket-friendly gadgets.  

The Die-Stacking Process in Integrated Circuit Technology

In the die-stacking process, the semiconductor ICs that are stacked and bonded together are called dice. The dice are connected within the package using solder balls or tiny wires. There are other steps involved with the die-stacking process. The block diagram above outlines the key steps. 

Stacking Arrangements

In the die-stacking process, multiple ICs are stacked vertically. The dice to be stacked are mounted on a substrate, interconnected using wire bonds or solder balls and finally molded into a single package that follows JEDEC standards. Other than stacked dice, it is possible to pack stacked as well as unstacked dice adjacent to each other in a single package. 

Mounting Pattern

In the die-stacking process, the mounting pattern can be any of the following.

• a) Smaller die mounted on top of larger die
• b) Larger die mounted on top of smaller die 
• c) Same-size die mounted on each other

The capability of the die-stacking process to stack dice irrespective of their size led to the development of a variety of options in 3D IC packages.

Benefits of the Die-Stacking Process 

The outcome of the die-stacking process is stacked-die chip packages. Compared to single-die packages, stacked-die packages have advantages.

Quality of Stacked-Die Packages

The quality of the stacked-die chip package depends on the quality of the dice. As the yield of the dice being stacked cumulatively adds up to the yield of the stacked-die chip package, it is important to focus on the availability of the dice. The cost of the stacked-die packages also depends on the yield. The higher the yield, the lower the cost, and vice versa. 

Applications

Die-stacking is a powerful technique that is in great demand considering IC packaging and circuit board footprint requirements. Initially, the die-stacking process was used for stacking memories such as flash and SRAM. However, as the technology matured, the process has been utilized for analog and logic IC packages as well.

Challenges of the Die-Stacking Process

Some of the common challenges faced in the die-stacking process are:

• a) Stacking dice in a thin wafer package
• b) Maintaining thermal and mechanical stability of the stacks on the substrate
• c) Maintaining electrical stability and reliability of the interconnections
• d) Choosing good dice

Despite these challenges, the die-stacking process is in demand in integrated circuit technology due to its many benefits – increased device functionality, space efficiency, high data transmission speed, reduced power consumption, improved performance, reliability, and support for PCB miniaturization.

Cadence’s Integrity 3D-IC platform can help you plan, implement, and build 3D stacked designs. Leading electronics providers rely on Cadence products to optimize power, space, and energy needs for a wide variety of market applications. If you’re looking to learn more about our innovative solutions, talk to our team of experts or subscribe to our YouTube channel.