Solderability is More Than Selecting the Right Solder
Solder Defects are inevitable. Reducing the risk of them is mandatory - especially if you’re aiming to actually make any money as a result of operations. The machines are certainly not “almost human” but they do go through seasonal changes and have moods. Without proper upkeep, they fall into disrepair. The goal in assembly is to dial in the thermal profile of the soldering equipment to minimize solder defects.
Accuracy of the footprint models is an enabler but that work can be undone by improper routing and copper-flooding techniques. Placement too near the edge of the board where the temperature fluctuates to a greater degree can decrease yields through the soldering process. Tombstoning is one thing to watch for but there are other dangers present out on the frontier.
The Goldilocks Zone
Another defect can occur when one lead of a component is close to the edge while the other is further inboard. Wirewound resistors and inductors can become open circuits or more insidiously latent defects where the wire pulls away from the lead only when there is a temperature rise or a mechanical shock to the system. Ceramic caps can actually crack when one lead solidifies before the other one.
The thing is that from an electrical engineering stand-point, it is often desirable to place a DC blocking cap right next to the RF in port. Further, the RF port is often right on the edge of the PCB. It’s pretty common to locate the connectors along the edges. This means the pins will be exposed to widely varying temperature profiles, particularly when there are multiple rows of pins.
Image Credit: Author - We paid the price in assembly for the feel-good moment of installing inductors too close to the edge of the PCB. Any edge, whether it is the outline or a slot, experiences more extreme temperatures during reflow.
Likewise, placing a component in the “shadow” of a taller component can prevent the part from reaching the temperature sufficient for proper reflow. Somewhere between getting too hot and not getting hot enough is the “Goldilocks zone” where everything comes together just right. Managing placement issues of this sort relies on using strong DFA rules built into the CAD system.
“PCB designers are the gate-keepers between the electrical engineering department and the factory”
Consistency of the land patterns is of paramount concern. An SMD pad that is flooded over requires more time to reach reflow temperature than a pad that is isolated from the copper by thermal spokes. In order to meet emissions standards, we are advised to pour a ground plane on both of the outer layers to act as a faraday cage around the electronics. This is one of several conflicts of interest that the PCB Designer must face.
We as PCB designers are the gate-keepers between the electrical engineering department and the factory. If this wasn’t important, they wouldn’t need us. Creating a PCB that meets the electrical requirements while maintaining manufacturability is our reason for existence. Don’t ever forget that. The EE means well when they chase that last 1% of margin while sending the assembly yield into the tank. Balancing that zeal with the reality of manufacturing is the reason they hire us to do the layouts.
Thermal Pads and Solder Volume
While a lot of components have uniform pin sizes, some will have one large pad and a number of smaller ones. It’s easy to “overcook” the smaller perimeter-pins while trying to get the ground-slug to reflow. Reducing the amount of paste deposited on the ground slug will allow it to get more in line with the signal leads.
Rather than one single opening in the paste stencil, it is advised to create a number of windows in the stencil so as to deposit a lesser but more controlled amount of solder paste on the ground paddle. One large opening in the middle of the ground paddle will allow the squeegee to scoop out a little off of the top of the paste window. Getting the same amount of coverage using an array of openings will give the solder a better chance of getting proper reflow.
Image Credit: Author - The heatsink provided by all of these vias is nice for performance but could be a hindrance during reflow assembly. It could be too much of a good thing.
An efficient board won’t be all that roomy. Why? Because PCB real estate costs money for the material and makes the end product larger than it has to be. If there is room for improvement in that area, it’s a safe bet that someone somewhere is going to do a better job of it and win the socket. Smaller is inherently faster but the circuit density also gives rise to higher operating temperatures. We walk a tightrope between these two competing factors.
As the geometry shrinks, it gets harder to pour a clean ground plane. It’s worth the effort to improve the DFA of the virtual board in the CAD software before getting into mass production quantities. As the density increases, the layer-count goes up. Half of the layers might be ground planes. That can create a huge imbalance between various pins on the same device if proper thermal isolation is not designed into the layout.
“The really cruel part is that the things we do to increase performance are often the cause of assembly issues.”
We have to be careful with through-hole connectors with respect to the ground pins in cases like that. If the ground pin doesn’t have thermal relief, it will get up to soldering temperature much more slowly than the signal pins. The higher melting point of the lead-free solders isn’t helping our cause either. The process window of hot-enough-to-flow-solder but cool enough to stay together gets tougher to maintain as we turn up the technology. Boards can blister, pads can lift, metal can migrate and all of these things can shut down an assembly line.
Image Credit: Author - Ground planes are used but sparingly and with thermal relief as the norm.
Prior to assembly, bare PCBs can be pre-baked to reduce the amount of water molecules in the dielectric sponge. They can be cleaned to remove any oxidation on the lands. Extra flux may be applied to areas where wetting is found to be insufficient. Using local fiducials around fine-pitch components can aid in alignment of the pick & place operation. Quality is found in the design as well as the process.
Striking a Balance Between Performance and DFA
The really cruel part is that the things we do to increase performance are often the cause of assembly issues. We want to make as good of a heat sink as possible for some pads in order to maintain optimal operating temperatures. Meanwhile, our high-speed signals are typically much thinner than the traces or shapes that are used by the power and ground pins.
Still, our goal is to design the board so that all solder joints are as equal in thermal mass as possible. Running a board through reflow is like making the entire Turkey dinner in that one big pan - including the pie! Everything wants to cook its own way.
One of the ways to get better soldering results with disparate thermal loads is with a more gradual ramp up to reflow temperatures. Fluxing agents and the granularity of the solder paste are two other levers the SMT operator can pull. While they can affect the process to some degree, using good DFA practices can open the process window enough to avoid defects in the first place.
In Summary:
Nailing the tactical and the technical challenges make assembly a forever-learning process. At the end of the day, our job is to balance the competing requirements of great performance and acceptable yields. It starts with good footprint design and manifests through smart layout decisions. There will be people who are uncomfortable with the compromises. If everyone is equally uncomfortable, you’ve probably found the best way forward.