Issue link: https://resources.pcb.cadence.com/i/1541046
10. Planning BGA and Fine-Pitch Fanout Before Surrounding Placement BGAs (Ball Grid Arrays) and fine-pitch ICs can dictate your entire layout's difficulty, layer count, and manufacturability. These packages often have high pin counts, closely spaced balls or leads (typically 0.4-1.0 mm pitch), and require carefully engineered escape routing ("fanout"). If you don't plan your fanout and reserve escape channels before placing adjacent components or routing, you may find entire rows of pins unroutable, forcing costly extra layers or even making the board unbuildable. Poor fanout also impacts rework, assembly yield, and long-term reliability. When And Where To Apply As soon as you place any BGA (Ball Grid Array), QFN (Quad Flat No-lead), LGA (Land Grid Array), or other fine-pitch component on the board, plan the fanout before populating nearby components or routing other nets. This is critical for high-density digital, FPGA, processor, or memory designs, but it applies to any fine-pitch or array package. Ball Grid Array (BGA) is a widely used IC package that allows for high pin density and compact layouts. Compared to older leaded packages, BGAs provide superior thermal dissipation and electrical performance. An essential design consideration with BGAs is the fanout strategy, which defines how the BGA pads are routed to PCB traces.