Portable devices that require ultra low-power can take advantage of NDR.
NDR drain diffusion produces a steep transfer slope in the threshold region of FET components.
NDR drain diffusion offers the potential for technology innovation.
Scientists use a technique called diffusion-weighted imaging to study the impact of aging on the brain. Diffusion-weighted imaging measures the gradual movement of water molecules—or diffusion—directionally along the white matter, rather than across it. The amount of molecular displacement caused by diffusion becomes part of the data that allows specialists to assess damage to white matter caused by aging, tumors, Alzheimer’s disease, and multiple sclerosis. Diffusion also impacts semiconductor devices, but in a much different way. Unlike in brain science, diffusion can be a positive thing when related to semiconductor devices. In fact, NDR drain diffusion offers many possibilities for new developments in semiconductor devices.
At one level, the fabrication of a semiconductor device occurs through diffusion. Diffusing impurity atoms in a semiconductor material at high temperatures introduces dopant atoms into the silicon. The length of diffusion time and the temperature determines the depth of dopant penetration.
At another level, current flows because of the diffusion of charge carriers. Thermal energy causes the carriers to move randomly. The random motion does not establish a net flow of carriers or a net current. Every carrier that leaves a location becomes replaced by another carrier. Introducing a carrier gradient causes carriers to diffuse from high-density regions to low-density regions.
The construction of a metal–oxide–semiconductor field-effect transistor (MOSFET) begins with deposits of an oxide layer on a substrate connected to the gate terminal. That oxide layer works as an insulator between the gate and the substrate. MOSFETs operate because of the diffusion of a lightly doped substrate with a heavily doped region. Depending on whether the construction of the MOSFET results in an N-channel or P-channel MOSFET, we may see a lightly doped P-type substrate and two heavily doped N-type regions, or a lightly doped N-type substrate and two heavily doped P-type regions.
In MOSFETs, diffusion forms the source, drain, and channel of the device. Diffusing the heavily doped regions onto the lightly doped region forms a channel. The source and drain of the MOSFET connect through the channel. Isolating the gate from the channel within a MOSFET allows the application of either positive or negative voltages to the gate to control the operation of the device. Applying a negative bias voltage causes the MOSFET to work in depletion mode. A positive bias voltage at the gate causes the MOSFET to work in enhancement mode.
Diffusion may also cause parasitics to occur in MOSFETs. The same construction that allows MOSFETs to operate also introduces parasitic capacitance into the device. Because of the insulation that separates the drain and source from the gate, a PN junction forms a parasitic diode between the drain and source. In turn, the drain-source capacitance becomes the junction capacitance of the parasitic diode. When we work with power MOSFETs, parasitic capacitance limits the operation of the MOSFET at some frequencies and switching speeds.
New FET Technologies
Current MOSFETS have low trap densities and low doping in channels.
At one time, MOSFETs and complementary MOSFETs offered the power efficiency and scalability needed for electronic devices. Current MOSFETs continue to have low trap densities and low doping in channels. However, MOSFETs cannot scale because of the limitations seen with the steepness of transfer characteristics in the subthreshold region. A steep slope results in a rapid change in current from OFF to ON in an electronic switch.
Today, though, the need for energy-efficient, scalable devices has introduced new types of field-effect transistors (FETs) such as tunnel FETs and negative capacitance field-effect transistors (NC-FETs). Each of those devices produces a steep slope.
In brief, the construction of an NC-FET supplements the oxide layer in a MOSFET with a thin-layer of ferroelectric material. Adding the ferroelectric layer increases negative capacitance and creates a steep slope effect. At specified voltages, the ferroelectric materials become reverse polarized; a decrease in voltage causes an increase in charge. As a result, NC-FETs have reduced power consumption and an on-current at a much lower supply voltage. Improved scalability occurs through a threshold voltage that increases with increases in the supply voltage. All this traces back to the simple concept of diffusion.
SPICE simulations can show the capability of NC-FETs to provide differential gain, plus a large signal gain leads to a hysteresis-free, minimal subthreshold swing. As a result, NC-FETs have become a viable option for the ultra-low power, highly portable applications used for consumer, industrial, medical, aerospace, and military devices. Diffusion-weighted imaging equipment, for example, gains the potential of using less power and gaining portability. The advantage given by this portability becomes apparent through faster MRI scans that can discover brain injuries and lead to quicker treatments.
SPICE model for power MOSFET
NDR Drain Diffusion
NC-FETs also provide the advantage of drain currents that decrease when the drain-source increases to saturation. When the drain current decrease occurs, the device has negative differential resistance (NDR). A steep transfer slope in the threshold region of FET components is produced by NDR drain diffusion. The dynamic resistance has an instant resistance that changes according to the current flowing through the resistor or the voltage applied to the resistor. When looking at the current-voltage curves for the dynamic resistor, we see positive resistance at the ends of the curve and negative resistance in the middle. Increasing the current or voltage causes the negative differential resistance to increase while the positive resistances decrease.
Devices and circuits based on negative differential resistance work as oscillators, frequency multipliers, and memory devices. In short channel NC-FETs, the NDR reduces the positive output conductance to a near-zero value and produces a high voltage gain. Component and circuit designs can optimize the NDR by matching the capacitance between the ferroelectric layer and the capacitance of the oxide layer and by controlling the capacitance between the drain and gate.
There are many potential technological innovations offered by NDR drain diffusion. To learn more, or search for a component for your latest project, visit the Cadence PCB Design and Analysis overview page. The cutting edge PCB design solutions from Cadence will make any project easy.
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