Issue link: https://resources.pcb.cadence.com/i/1541046
12. Respecting Assembly Spacing and Rework Access How To Implement 1. Obtain assembly guidelines from your contract manufacturer (CM): f Request their latest DFM f (Design for Manufacturability) or assembly capability document. f Common minimums: ɢ SMD component-to-component (side-to-side): 10-12 mil (0.25-0.3 mm) minimum ɢ End-to-end spacing: 20 mil (0.5 mm) or more ɢ TH (through-hole) part to SMD: 40 mil (1 mm) ɢ Component to board edge: 20-40 mil (0.5-1 mm), more for heavy or high-profile parts 2. Apply spacing constraints in your EDA tool: f Set up component keep-out and minimum clearance rules and activate online DRC for violations. f For high-density areas (BGAs, dense passives), consider increasing spacing for easier rework and inspection. 3. Reserve access around critical parts: f Leave open space (≥2-5 mm) around large ICs (especially BGAs, QFNs, FPGAs) for rework nozzles and hot-air tools. f Provide clear probe access to test points, debug headers, and key pins (≥2 mm open area). 4. Mind component height and shadowing: f Place tall parts (electrolytic capacitors, connectors, transformers) so they don't shadow or block pick-and-place access for smaller nearby components. f Check for headroom above all parts for Automated Optical Inspection (AOI) and for the enclosure or shield. 5. Ensure cleaning and washing clearance: f For boards requiring post-solder wash, avoid narrow gaps (<1 mm) between components that can trap flux or cleaning fluid. 6. Edge and panelization considerations: f Keep critical parts and fragile SMDs at least 40 mil (1 mm) from V-score or breakaway tabs to avoid damage during depanelization. f Check for adequate room for fiducials, tooling holes, and board edge features. 7. Review with your assembly house: f Before finalizing placement, send the layout for a DFM review by your assembler. Adjust spacing as needed per their feedback. Common Pitfalls, Their Impact, and How to Avoid Them Common Pitfall How to Avoid it Blindly trusting an EDA tool's default DRC Not all tools are up to date with your Contract Manufacturer's real-world minimums - Always verify with your manufacturing partner. Overcrowding dense areas "to save space" Results in poor solder joints, high defect rates, and no rework access – Enforce placement density limits and rework keepouts. Placing tall and short parts side-by-side Can block pick-and-place nozzles and shadow AOI (Automated Optical Inspection), leading to missed defects – Plan for assembly processes, place the tallest compo- nents away from board edges, and keep components of similar height grouped together. Ignoring test and debug access Makes bring-up and field trouble- shooting nearly impossible – Add test pads or headers on critical nets with probe access.