Issue link: https://resources.pcb.cadence.com/i/1180280
Embedded Component Design Embedded Component Design October 2019 11 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. ❑ Before signing up for cavity support, contact fabricator and inquire to what degree of accuracy will be used for design intent for cavity milling. The use of the placebound shape may suffice; at least for the initial PCBs you design. ■ Use of alternate symbols for embedded placement ❑ The property syntax for alternate symbols has been modified to include an optional INTERNAL (or I) keyword followed by a list of symbols allowed on an internal layer. This is an optional syntax. By default, any symbol on the any list is allowed on an internal layer. Placement on embedded layers is also controlled with the EMBEDDED_PLACEMENT and the ALT_SYMBOLS_HARD properties. ❑ Alt Symbols Hard: When present on a component, ignores JEDEC_TYPE for internal placement. Uses symbols listed in the component's ALT_SYMBOL property sections of any or INTERNAL layer for embedded placement. ■ Special order components with unique symbol characteristics.Itmay be associated with use of Indirect Attach methodology. ■ All library package symbols contain pin escape vias. Library-driven symbol vias will be removed when the component is placed on an internal layer.