Accurate Modeling of PCIe 3.0 Analog Buffers

October 19, 2018 Cadence PCB Solutions
  • PCIe 3.0 and other current and future high speed protocols require complex equalization schemes to open the eye at the receiver sampler
  • These equalizers (AGC, CTE, DFE, etc.) interact with each other during adaptation
  • Managing this sequence of events can be challenging
  • Correlation is even more challenging

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