Generating Circuit Ports for Signal and Power Nets of a Layout File in PowerSI
![](https://play.vidyard.com/W2ta8WRmAw5V1CSpA4kqra.jpg)
Demonstrating the step-by-step process for generating circuit-ports by defining circuits at the signal and power nets locations on a layout file in PowerSI.
Demonstrating the step-by-step process for generating circuit-ports by defining circuits at the signal and power nets locations on a layout file in PowerSI.