The Cadence® Sigrity™ OptimizePI™ environment automates the selection and placement of decoupling capacitors (decaps) to assure products meet power-delivery network (PDN) performance targets at the lowest possible cost. The Sigrity OptimizePI approach may be applied to PCBs and IC packages, or a combination thereof. Cadence’s proprietary and proven Sigrity analysis technologies are augmented with an efficient optimization engine to uniquely enable cost-based PDN design. The Sigrity OptimizePI capabilities can fully explore the feasible design space and identify a range of candidate decap implementations, enabling users to pinpoint the ideal approach.
Work in concert with the fastest available simulation to support design improvements without excess cost an...
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Via placement in high-speed designs need careful consideration to ensure that the board performs as expected, and we have some ideas that can help you.
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The effect of noise margin parameters is critical to the functionality of ADSL connectivity.
Quickly and easily identify signal integrity issues with various tools to improve design performance.
Knowing and applying the types of FEA analysis discussed in this blog will improve your design’s manufacturability and reliability.
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Your design data can be used in simulations to manage PDN impedance. Here’s how this works in PSpice from Cadence.
What’s the difference between power spectrum vs power spectral density? Here’s how these important concepts relate to your signals.
Analog signals can contain undesired harmonic components, but harmonic termination can be used to remove undesired frequency components.
Forward and reverse biasing gives a circuit designer optimal control over a diode's functionality.
You can optimize your signal chain to receive and transmit maximum peak envelope power with the right circuit simulator.
A purely resistive circuit is a circuit that has inductance so small that at its typical frequency, its reactance is insignificant.
There are several keys to laying out a successful multilayer design. Here’s more information on one of those, a board layer stackup to manage power planes.
Coupled loads analysis is critical for assessing reliability of spacecraft. Here’s how the results can be used in PCB design.
Verify your component choices with probabilistic design for reliability. You can use this technique to determine chances of failure in your next PCB.
Clocks are essential gatekeepers of the digital domain. Setting the pace for all that follows the clock can be a single trace or a partnership of two traces that carry complementary signals.
You see, it’s like this. When two circuits love each other very much, they form a life-long bond and then little Diffs are propagated. Not really, but when we peruse the net names attached to the...