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Sigrity OptimizePI

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Fully explore the feasible design space and identify a range of candidate decap implementations, enabling users to pinpoint the ideal approach.

The Cadence® Sigrity™ OptimizePI™ environment automates the selection and placement of decoupling capacitors (decaps) to assure products meet power-delivery network (PDN) performance targets at the lowest possible cost. The Sigrity OptimizePI approach may be applied to PCBs and IC packages, or a combination thereof. Cadence’s proprietary and proven Sigrity analysis technologies are augmented with an efficient optimization engine to uniquely enable cost-based PDN design. The Sigrity OptimizePI capabilities can fully explore the feasible design space and identify a range of candidate decap implementations, enabling users to pinpoint the ideal approach.