Power MOSFETs in Series and Parallel

MOSFETs are arguably the most important component appearing in power electronics as they are used for switching and rectification. When looking in reference designs, it’s common to see these appear as individual elements, or only as multiple elements in push-pull/bridge circuits. In production designs, where the specifications of a single MOSFET limit reliability and performance, it’s likely you will see multiple MOSFETs arranged together as a single switching or rectification element. When used together, MOSFETs can be arranged in series or parallel, just like other components.

The ability to operate these components in series or parallel allows a designer to control the power flow behavior of their system. Instead of looking for larger MOSFETs, smaller MOSFETs can be wired in series or parallel to provide the same function. The other benefit is greater reliability, but there is a danger of unwanted parasitics creating disruptive power delivery if the system is not qualified in simulation.

Using MOSFETs in Series and Parallel

Just like other circuit elements, MOSFETs can be arranged in series and parallel. This involves connecting source and drain terminals on different MOSFET components together to create an equivalent circuit with the desired power delivery characteristics. The required terminal connections between MOSFETs in series and parallel are shown in the image below.

Series (left) and parallel (right) arrangements of N-MOSFETs.

The left arrangement (series) looks a lot like a push-pull arrangement in a buffer circuit, except the circuit uses the same type of MOSFET everywhere and the driving signal is in-phase for all MOSFETs in the circuit. The same point applies in a parallel arrangement, and this is quite important to ensure parasitics in these components can be well accounted for.

The design benefits found in series and parallel arrangements of MOSFETs are shown in the table below. The benefits of series/parallel arrangements as opposed to single large MOSFETs span primarily across electrical behavior and cooling benefits.

Cooling Series/Parallel MOSFETs

Once hooked up in a circuit, a cooling strategy needs to be devised. The cooling strategy used in these circuits should take advantage of any die-attached pad that is exposed on the package if it is available. If mounted on the board, the pad can be connected to an internal plane. However, if mounted upright, the MOSFETs could share a heatsink that is mounted to the PCB, as shown below.

In much higher power systems, a more elaborate cooling strategy involving fans may be warranted. This could also require adding fins or inlets to the enclosure. A more aggressive strategy involves conduction cooling directly into the enclosure, possibly with a thermal interface material.

Transient Response

The main challenge involved in using series and parallel MOSFETs is parasitics in the circuit. Parasitics are already difficult with individual MOSFETs that switch with fast edge rate, but the parasitics in a series/parallel MOSFET circuit can combine to produce strong oscillations during operation. This happens despite the low rise times in many switching MOSFETs used in power electronics applications.

There are two simple ways to dampen the oscillations in these circuits:

• Add a small amount of resistance (a few Ohms) to compensate for the very low R_ON value of the MOSFETs
• Place MOSFETs as close as possible to each other to reduce trace inductance in the PCB layout

The first strategy can be found in many reference designs; it essentially adds some damping to the transient oscillation that occurs during switching. Although it slightly slows down power delivery, it will prevent an oscillation excited by one MOSFET from damaging or destroying the other MOSFETs. These points can be qualified in a simple SPICE simulation.

Simulating MOSFETs in Series and Parallel

Circuit elements in parallel are simple to wire and simulate in SPICE. For MOSFETs in series and parallel, the primary simulation tool to use for system qualification is transient analysis. The goal in this simulation is to examine the time-domain output given an input power source and the switching/rectification action in the MOSFET array. From this simulation, it’s possible to directly visualize any transient oscillation on the output voltage/current delivered to a load.

The problem with SPICE-based simulations is that it can be difficult to quantify the effects of trace inductance connecting the MOSFETS in an array. This is important because it will determine how large the connections between terminals on a MOSFET must be in order to ensure stable power delivery. One strategy is to iterate through a range of possible lead inductance values in the MOSFET models, which will account for a lead + trace inductance in total. Sensitivity analysis with a parameter sweep is the best tool to use for this as it will allow the output results to be overlaid and compared in the same graph.

When you’re ready to design and simulate your power MOSFETs circuits with series and parallel elements, make sure you use the industry’s best circuit design and simulation tools in PSpice from Cadence. PSpice users can access a powerful SPICE simulator as well as specialty design capabilities like model creation, graphing and analysis tools, and much more.

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