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High-Speed HDI Stackups for Signal Integrity & EMI Control with Allegro X

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In this video, we explore how stackup architecture directly impacts high-speed performance using Allegro X. Through a real-world example of a 10-layer HDI carrier board, we demonstrate:

  • Plane adjacency for effective Electromagnetic Interference (EMI) containment
  • Dielectric material selection for controlled impedance
  • Capacitive coupling between power and ground for improved power integrity
  • The influence of material properties on propagation delay and signal attenuation

We also provide a step-by-step guide on configuring conductor layers, dielectric materials, copper weights, and electrical parameters within Allegro X. By optimizing the stackup to support the intended signal environment before routing, you can ensure better performance and reliability in high-speed HDI designs.