03 - Post-Layout Routed Interconnect Extraction/Constraint Export

As demonstrated in the previous modules, extracting a net from Allegro (or Constraint Manager) can be easier than building a topology from scratch.
In this module, you will learn the following:

• Extracting routed interconnect into TopWb
• Creating a constraint set for the board by using the extracted routed interconnect topology.

1. Back in Allegro, use File > Open and select postlayout_Module1.brd (no need to save the .brd that is already open).

   If you are using the Sigrity X Aurora product, you get the following application modes by right-clicking on the Topology Workbench canvas:

   
2. Relaunch Constraint Manager from the main menu by using Setup > Constraints > Constraint Manager.
3. Right-click on the PP_A(14) bus and select Explore Topology.

   

   Ignore the message about discrete models.

4. With the Extract for simulation option enabled in the Options dialog, the topology is extracted to the Sim tab.
5. Select Export Constraint Topology from Constraint Setup. A new tab with the opens within the Sigrity X Topology Workbench window.

   

6. Select Set Topology Constraints. In the Properties panel, change Stub Length to 2.0000 mil.
   

   

7. Click Update Constraint Manager in the Workflow panel to write the modified constraint values back to the design database (Constraint Manager).

Summary

This RAK demonstrated the method to get started with creating topologies in Sigrity X Topology Workbench and using it effectively in conjunction with Constraint Manager extract topologies and update constraints like ECSet to be applied back to the design database.