Allegro Front to Back User Guide

Allegro Front-to-Back User Guide Creating and Managing Libraries October 2019 19 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. all within a single user interface. This allows information such as pin names and common properties to be shared across the different views of the component. With built-in error checking, Part Developer ensures that parts are consistent and error-free. Part Developer also has the ability to handle asymmetrical, large pin count and technology-independent parts. Part Developer supports automatic part data entry using XML and adherence to company guidelines using part templates. For more information about creating and managing parts in Part Developer, refer to the Part Developer User Guide. Part Table Editor PTF Editor is shipped as part of PCB Librarian, PCB Librarian XL, and the latest packaging configurations of Allegro Design Entry HDL. You can use the Part Table Editor to: ■ Create a part table ■ Modify a part table ■ Verify the part table ■ Add new parts to the part table Physical Part Table File Uses The Physical Part Table (.ptf) file stores the packaging properties for a part in the library. This file contains part information such as package types, manufacturer names, part numbers, and any custom properties. Each physical part must have an entry in the.ptf file in order to be packaged properly. In a part table file: ■ A unique part number is assigned based on the package style. ■ An Allegro package symbol name is assigned based on the package style. Note: The JEDEC_TYPE property may also be defined in the chips.prt file. However, the part_table view has the priority. ■ A part description is added. For more information about creating part table files using Part Table Editor, refer to Part Table Editor User Guide.

• Cover
• c contents - Contents
• Preface
• About the Front-to-Back Flow
• How This Book is Organized
• Creating and Managing Libraries
• Allegro Front-end Tools Libraries
• Library Structure
• Creating and Managing Libraries
• OrCAD Libraries
• Capturing Logical Design
• Creating Project Using Allegro Tools
• System Capture
• You can also perform other page manipulation operations, such as creating a new page or deleting an existing page from the Project viewer. You can drag and move the pages up and down to change their order in the Project viewer.
• Allegro Design Entry HDL
• Creating Project Using OrCAD Capture
• Creating a Schematic
• Designing Schematic Using System Capture
• Creating Schematic Using OrCAD Capture
• Capturing Logical Designs using DE-HDL
• Capturing Logical Design Constraints
• Why Constraint Manager?
• Using Constraint Manager with Design Capture Tools
• All the constraints are stored in the Constraint Manager Database (CMDB) and saved in the dictionary and constraints file designname.dcf.
• Constraints in System Capture
• Capturing Constraints in Design Entry HDL
• Capturing Constraints in OrCAD Capture
• Creating Variants of Your Design
• Managing Variants in System Capture
• Creating Variants using Variant Editor
• Getting Logical Design Ready for Physical Layout
• Preparing a System Capture Design for Physical Layout
• Preparing a DE-HDL Design for Physical Layout
• Exporting a DE-HDL Design
• Forward Mode
• Preparing an OrCAD Capture Design for Physical Layout
• Exporting an OrCAD Capture
• Annotating the Design
• Packaging Your Design (Advanced)
• Generating a Bill of Materials
• Updating the Schematic With the Changes in the Board
• Passing Properties from the Layout to Schematic
• Designing Layout
• Physical Layout using OrCAD PCB Editor
• Creating a Board Outline
• Creating Symbols and Padstacks
• Importing Logic
• Defining Layers
• Defining Constraints
• Placement
• Routing
• Design Synchronization
• Physical Layout using OrCAD Capture
• Preparing the Schematic for Layout
• Property Flow from Capture to PCB Editor
• Generating Initial Board File
• Backannotation from PCB Editor
• Running Design Rules Check - Physical Rules
• Capturing Physical Constraints
• Using Constraint Manager with PCB Editor
• Synchronizing Schematics and Boards
• Need for Synchronization
• Design Synchronization Tasks
• Feedback Mode