Allegro Front to Back User Guide

Allegro Front-to-Back User Guide Capturing Logical Design October 2019 28 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Any schematic design module can include either schematics or VHDL/Verilog models as instantiated components. However, VHDL/Verilog design modules are limited to other modules of the same type as instantiated components. Hence, if the root module of your design is a VHDL model, all lower level modules must also be VHDL models. A design file also contains a design cache, which is like an embedded library — it contains a copy of all the parts and symbols used on the schematic pages. You can create a new design file to replace the design created by the project manager. Using the design variants capability of OrCAD Capture, you can also manage unlimited board assembly variations without having to maintain duplicate schematics or manually edit individual BOMs. This capability reduces the number of files by maintaining all design assembly variations within a single design and outputs. On the schematic canvas, substituted and/or unplaced components within each assembly are displayed through graphical indicators for easy reference. For more information about creating logical design using OrCAD Capture, refer to the Working with Designs section of OrCAD Capture User Guide.

• Cover
• c contents - Contents
• Preface
• About the Front-to-Back Flow
• How This Book is Organized
• Creating and Managing Libraries
• Allegro Front-end Tools Libraries
• Library Structure
• Creating and Managing Libraries
• OrCAD Libraries
• Capturing Logical Design
• Creating Project Using Allegro Tools
• System Capture
• You can also perform other page manipulation operations, such as creating a new page or deleting an existing page from the Project viewer. You can drag and move the pages up and down to change their order in the Project viewer.
• Allegro Design Entry HDL
• Creating Project Using OrCAD Capture
• Creating a Schematic
• Designing Schematic Using System Capture
• Creating Schematic Using OrCAD Capture
• Capturing Logical Designs using DE-HDL
• Capturing Logical Design Constraints
• Why Constraint Manager?
• Using Constraint Manager with Design Capture Tools
• All the constraints are stored in the Constraint Manager Database (CMDB) and saved in the dictionary and constraints file designname.dcf.
• Constraints in System Capture
• Capturing Constraints in Design Entry HDL
• Capturing Constraints in OrCAD Capture
• Creating Variants of Your Design
• Managing Variants in System Capture
• Creating Variants using Variant Editor
• Getting Logical Design Ready for Physical Layout
• Preparing a System Capture Design for Physical Layout
• Preparing a DE-HDL Design for Physical Layout
• Exporting a DE-HDL Design
• Forward Mode
• Preparing an OrCAD Capture Design for Physical Layout
• Exporting an OrCAD Capture
• Annotating the Design
• Packaging Your Design (Advanced)
• Generating a Bill of Materials
• Updating the Schematic With the Changes in the Board
• Passing Properties from the Layout to Schematic
• Designing Layout
• Physical Layout using OrCAD PCB Editor
• Creating a Board Outline
• Creating Symbols and Padstacks
• Importing Logic
• Defining Layers
• Defining Constraints
• Placement
• Routing
• Design Synchronization
• Physical Layout using OrCAD Capture
• Preparing the Schematic for Layout
• Property Flow from Capture to PCB Editor
• Generating Initial Board File
• Backannotation from PCB Editor
• Running Design Rules Check - Physical Rules
• Capturing Physical Constraints
• Using Constraint Manager with PCB Editor
• Synchronizing Schematics and Boards
• Need for Synchronization
• Design Synchronization Tasks
• Feedback Mode