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Pad Stacks

Key Takeaways

  • The manufacturing motivation for the creation of the pad stack.

  • A discussion of the benefits and drawbacks of non-functional pads.

  • The IPC naming convention for pad stacks.

Through-hole component standing on PCB

Beneath the mounting layer, lay additional pads for each plated through hole to form a pad stack

Pads are the invaluable mechanism by which discrete components are joined to the board to incorporate their functionality into that of the board. Pad design is crucial for the assembly and fabrication processes. Pads are used in plated through holes (PTHs) for higher reliability connections between traces and PTHs. Since PTHs operate as layer-to-layer connections in multi-layer boards, these pads need to be present on any signal layer that connects to the PTH.

The vertical collection of these pads centered on a PTH is known as the pad stack, and implementation of the pad stack has a notable effect on the long-term performance and reliability of the board. Designers will want to consider how the non-functional pads of a pad stack impact manufacturing as well as the naming of pad stacks for consistency and design reuse.

Construction of Landing Pads and Non-Functional Pads

Before diving into the pad stack, it may be valuable for the reader to understand the general process of creating a PTH. The design of PTHs includes the dimensioning of the hole and the capture pad, which encircles the drilled hole and extends radially an additional distance away from the hole (ideally). 

The capture pad serves two purposes: it allows for some drill wander from the pad center and provides an annular ring (the ring of copper that extends from the hole edge to the pad edge),which improves solderability to components and connectivity to traces. This annular ring needs to be present on any inner layers with routing to the through-hole as well, the collection of which forms the pad stack. In most cases, the design of the individual pads holds constant for all the layers spanned by the drilled hole; a common exception is a square pad on the outer layer a through-hole component rests on to indicate polarity. 

Inner layer pads that have no traces connecting to the capture pad are deemed non-functional pads. The inclusion of non-function pads can lead to post-manufacturing defects that can be difficult to detect. Additionally, the removal of non-functional pads benefits designers by increasing the amount of routing space available to optimize layout; while the space reclaimed by each pad removal is small, the total area reclaimed can be significant in areas with tightly-spaced PTHs (e.g., a via array). 

Is the removal of non-functional pads always the preferred manufacturing method? Like most engineering decisions, it’s difficult to provide a one-size-fits-all solution. More often than not, non-functional pad removal is more advantageous. However, since the manufacture of each PCB differs slightly due to variations in function and requirements, production of the board will want to analyze the benefits and drawbacks offered by non-functional pads to a specific design.

Cases For and Against Non-Functional Pad Removal



  • Improves drilling outcomes and reduces wear on drill bits

  • Stability can be improved by the presence of functional copper in the near area

  • Thermal reliability increases with their exclusion

  • Imposes larger circular cutouts on power planes, potentially resulting in loss of signal integrity and current chokepoints

  • Epoxy-filled vias provide many of the mechanical benefits of non-functional pads at minimal cost

  • High-layer count boards may suffer from reduced reliability

  • In flex and rigid-flex, removal of the non-functional pads can inhibit the adhesiveness of copper plating to flex substrate

  • For vias acting as purely mechanical features, removal of functional pads can lead to separation of plating from dielectric in via barrel (hole wall pull away)

  • Their removal on plane layers does not impact routability of the design

Selective non-functional pad removal may offer a suitable compromise between fabrication and design constraints. Ideally, non-functional pads are removed in a manner that distributes them in a balanced arrangement: they can be comfortably removed from the middle of the board while remaining on layers closer to the top and bottom. This affords designers the ability to “place” non-functional pads where they will minimally affect the layout of the board while still retaining some mechanical conveniences.

IPC Pad Stack Naming Conventions

Pad stacks carry some default settings that can be otherwise indicated in the pad’s name:


The solder mask, paste mask, and assembly layers are all sized 1:1 with the land.


Inner layer pads are the same as outer layer pads, top/bottom pads are the same size, and inner layer pads, vias, and mounting holes default to circular pads

Thermals and producibility.

Thermal pads utilize 4 spokes, and characteristics like inner/outer diameter and spoke width are set by the desired level of producibility (general, moderate, or high).

Much like common packages land patterns, IPC has devised a naming convention for pad stacks for ease of library management:

  1. The first letter indicates the shape of the pad.
    1.  c - circle; s - square; r - rectangle; b - oblong; u - contour (irregular); d - d-shape (square edges on three sides of the pad, semi-circle on remaining pad “edge”)
      1.  v - vias and w - mounting holes can be used to indicate the specific role of the pad stack. Vias default to a circular pad unless otherwise indicated.
  2. The value(s) following the shape designator indicates in metric the length of the dimension starting from the hundredths digit and filling left. As an example, 10 and 100 would indicate .10 mm and 1.00 mm, respectively. Slotted holes must indicate two values for the x- and y-dimensions. 
  3. Variant characters can be used to indicate where the pad stack differs from default settings.
    1.  n - non-plated hole; z - inner layer land dimensions (if different); x - opposite-side land parameters; t - thermal relief land dimensions (if different); m - solder mask dimensions (if different); p - solder paste dimensions (if different); a - assembly layer dimensions (if different); y - plane clearance/anti-pad (if different); o - offset origin; k - keep-out region; r - radius dimension for rounded rectangle; c - chamfer dimension for chamfered rectangle
      1.  Rounded and chamfered rectangles can indicate corners where applied: bl - bottom-left; br - bottom-right; ul - upper-left; ur - upper-right; ulr - upper-left and -right; blr - bottom-left and -right; ubl - upper- and bottom-left; ubr - upper- and bottom-right
  4. Characters can be combined for greater specificity. For example, mx0 indicates the solder mask layer on the opposite side of the mounting layer is set to 0.

See How Cadence PCB Software Stacks Up

Pad stack characteristics are an integral component of PTH design, and design and manufacturing will want to carefully weigh the benefits of non-functional pad removal for optimal performance.  To aid in this check, Cadence offers a wealth of tools for advanced simulation and modeling that can provide design teams solutions before entering into production, saving time and money. Our collection of PCB Design and Analysis Software enables a deep dive into the finer details of a PCB to improve outcomes across the full range of DFX methodologies. Findings can be easily folded into the fast and powerful  OrCAD PCB Designer for a seamless ECAD environment to support accelerated development turnaround times.

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