What Size Capacitor Should I Use?

Capacitors are among the most specification sensitive passive components in a PCB design. Choosing the wrong one doesn't just degrade performance; it can cause outright failure in ways that are difficult to debug after the board is built. The selection decision involves more than reading off a nominal capacitance value. Voltage rating, dielectric material, ESR, self-resonant frequency, temperature coefficient, and ripple current handling all interact, and getting any one of them wrong introduces risk.

The correct capacitor selection starts with understanding the capacitor’s role in the circuit. A decoupling capacitor, bulk energy storage capacitor, timing capacitor, and RF bypass capacitor may all require different dielectric materials, ESR characteristics, and voltage derating strategies even if their nominal capacitance values appear similar.

Capacitors are key passive components used in the electronics industry

Capacitance and Dielectric Class

The nominal capacitance value is the starting point, but the dielectric material determines how much of that capacitance is actually available under operating conditions. This distinction matters most for ceramic capacitors, which dominate modern PCB designs from picofarad-range RF decoupling through microfarad-range power supply filtering.

Class I dielectrics (C0G/NP0) provide stable capacitance across temperature and voltage with a temperature coefficient near zero. They are the right choice for timing circuits, filters, and any application where predictable capacitance matters. The tradeoff is lower capacitance density, a C0G cap is physically larger than an X7R of the same nominal value.

Class II dielectrics (X7R, X5R) offer higher capacitance density but exhibit two important non-idealities. First, capacitance varies with temperature, up to ±15% over the rated temperature range for X7R, though many parts stay well within that bound under typical operating conditions. Second, and more consequentially, capacitance drops sharply with applied DC voltage. An X7R MLCC (multilayer ceramic capacitors ) rated at 10 µF may deliver only 3-4 µF at its rated voltage. At 50 percent of rated voltage, capacitance loss can still reach 20-40 percent depending on the specific part and package. That loss figure is highly part specific. Always verify against the manufacturer's DC bias curve directly using tools such as Murata SimSurfing, TDK's online capacitor selector, or Kemet's KSIM rather than relying on a generic estimate.

For high-capacitance MLCCs (10 µF and above), ±20% is frequently the only tolerance available at a given value. This compounds the DC bias problem, the as-built capacitance before derating may already sit at the low edge of the tolerance band.

Class II ceramic dielectrics such as X7R and X5R also exhibit logarithmic capacitance aging over time, while C0G capacitors remain substantially more stable.

Wider tolerance dielectrics such as Y5V and Z5U exhibit even more severe capacitance variation and are rarely appropriate where the capacitance value has any functional significance.

Electrolytic capacitors, both aluminum and tantalum, cover the higher capacitance ranges where ceramics become impractical. Aluminum electrolytics are the standard choice for bulk power supply filtering and energy storage. Tantalum capacitors offer better volumetric efficiency and lower ESR but require careful attention to voltage derating. Under overvoltage, tantalum capacitors fail short, which can result in sustained fault current and board damage. Aluminum electrolytics follow a different failure sequence. Electrolyte breakdown typically produces a resistive short first, then progresses to open circuit or venting as internal pressure builds. Neither technology fails safely under overvoltage. The failure modes differ, but the design implication is the same, both require adequate voltage derating margins.

Capacitor selection is highly application dependent. High-speed IC decoupling typically prioritizes low ESL ceramic capacitors placed close to device power pins, while bulk power filtering may prioritize ripple current capability and ESR. Precision analog and RF circuits often require C0G/NP0 dielectrics for stability, whereas general-purpose power rail decoupling commonly uses X7R capacitors for higher capacitance density.

Voltage Rating and Derating

Exceeding the rated voltage of any capacitor accelerates aging of the dielectric material and increases the probability of breakdown. The appropriate derating factor is technology specific.

For aluminum electrolytic capacitors, derating applies to two separate quantities. The rated voltage is a DC rating, not a peak rating. DC voltage derating targets operation at no more than 80% of that value. Ripple voltage derating is a separate calculation. The peak AC ripple voltage adds directly to the DC operating voltage, and the instantaneous sum must remain within the rated voltage with adequate margin. Many reliability focused designs apply derating to both quantities independently. Treating them as a single combined rule produces an undersized derating.

For tantalum capacitors, operating at 50% of the rated voltage is standard practice in reliability sensitive designs given the fail-short failure mode described above.

For ceramic capacitors, the voltage derating question intersects with the DC bias derating issue. Selecting a part with a higher voltage rating than strictly necessary provides a safety margin against dielectric breakdown. It also moves the operating point to a lower fraction of the rated voltage, recovering a meaningful portion of the capacitance lost to DC bias effects. Higher voltage rating means a larger physical package for the same nominal capacitance, but the effective capacitance at operating voltage may be substantially better. High reliability designs often apply approximately 50% voltage derating to ceramic capacitors, though commercial electronics may use smaller margins depending on reliability targets and DC bias requirements.

ESR, Ripple Current, and Self-Resonant Frequency

ESR (equivalent series resistance) is the resistive component of the capacitor's impedance. It is distinct from dielectric leakage current and arises from the resistance of the leads, plates, and internal interconnections. Ripple current flowing through ESR produces I²R heating inside the capacitor. Exceeding the ripple current rating shortens component life and in severe cases causes thermal runaway in electrolytic capacitors.

Film capacitors provide lower ESR and higher ripple current handling than aluminum electrolytics of comparable capacitance. They are the appropriate choice for applications with sustained high ripple, such as switching power supply output stages, where electrolytic ripple current ratings may be insufficient.

For high-frequency decoupling, ESR and self-resonant frequency (SRF) are often the dominant selection criteria. Every capacitor has an SRF above which it behaves inductively rather than capacitively. The SRF is set by the interaction between capacitance and the component's equivalent series inductance (ESL). ESL arises from the physical geometry of the package and internal construction. Larger packages carry higher ESL, which drives SRF lower. Smaller packages (0402, 0201) have lower ESL and resonate at higher frequencies for the same capacitance value. Trace length and via placement between the capacitor and the decoupling target add inductance to the loop beyond the component's own ESL. Physical placement therefore matters as much as component selection for high-frequency decoupling. In the tens to hundreds of megahertz range, placing multiple smaller capacitors in parallel lowers effective inductance and pushes the combined resonance higher. A 100 nF and a 10 nF in parallel often outperforms a single 110 nF cap for broadband decoupling.

Temperature Rating and Temperature Coefficient

Every capacitor datasheet specifies an operating temperature range. Selecting a part whose upper temperature limit matches the application ambient is necessary but not sufficient. Internal heating from ripple current raises the component's actual operating temperature above ambient. The thermal margin between the component's rated temperature limit and the expected worst-case internal temperature needs to be verified, not assumed.

Different capacitor temperature rating classifications determine how capacitance changes across the operating temperature range and whether the component remains stable under real-world operating conditions.

For circuits where capacitance stability over temperature matters, the temperature coefficient of the dielectric determines how much the capacitance drifts. C0G capacitors specify temperature coefficient in parts per million per degree Celsius and are appropriate where tight capacitance control is required across the full operating temperature range. X7R and X5R parts specify capacitance variation as a percentage over their rated temperature ranges. That is adequate for most power supply and general filtering applications but insufficient for circuits where capacitance tolerance directly affects output accuracy, such as a voltage reference or precision oscillator.

Tolerance

Tolerance affects how closely the as-built capacitance matches the design intent. Standard ceramic capacitors are available in ±5%, ±10%, and ±20% tolerances. For timing circuits, oscillators, and precision filters, tighter tolerance reduces the need to compensate for component variation in layout or firmware. For bulk decoupling, wider tolerance is generally acceptable. The interaction between tolerance and DC bias derating should still be verified rather than assumed.

Other Parameters Worth Checking

Leakage current matters for sample and hold circuits, low power sleep states where the capacitor holds a charge over extended periods, and any application where charge retention affects system behavior. Film and C0G ceramic capacitors have substantially lower leakage than electrolytic types.

Reverse voltage tolerance matters for aluminum electrolytic capacitors, which are polarized. These capacitors have a reverse voltage limit that is typically in the range of 1-1.5 V, though the specific threshold varies by manufacturer and series. Exceeding it degrades the dielectric and can cause failure.

Some LDO regulators require specific output capacitor ESR ranges for loop stability, so capacitor substitutions should always be checked against the regulator datasheet.

Validating the Selection Before Layout

Capacitor selection reduces to matching actual behavior under operating conditions to circuit requirements. The parameters covered in this blog interact. A capacitor that passes the voltage derating check on nominal capacitance may fail it once DC bias derating is applied. A part that meets the ripple current rating at ambient may exceed its temperature limit under load. Checking each parameter in isolation is not sufficient.

PSpice, integrated within both Allegro X PCB System Capture and OrCAD X Capture, identifies capacitors operating above their derated voltage limits at the schematic stage before layout begins. The accuracy of that check depends on the fidelity of the capacitor SPICE model in use. A generic model that does not capture voltage dependent capacitance behavior will not reflect DC bias derating in the simulation results. Before relying on PSpice for DC bias verification, confirm that the capacitor model includes voltage dependent capacitance parameters. Manufacturer supplied models typically include these. Generic library models typically do not.

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