Sigrity SI/PI Simulation Training

Learn how Sigrity technology helps you address everything from simple electrical analysis to multi-board signal simulations with advanced SI/PI analysis.

  • Understanding W-Element Transmission Line Model for Pre-Layout Parallel Bus in SystemSI8:28

    Understanding W-Element Transmission Line Model for Pre-Layout Parallel Bus in SystemSI

    Explaining different components of the W-Element transmission line model, such as the MCP (model connection protocol) section and RLGC matrices, generated by the TLine Editor.

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  • PDN: Gives Your Board Life

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  • Understanding Transmitter and Receiver AMI Model Parameters of Serial Link Systems in SystemSI19:57

    Understanding Transmitter and Receiver AMI Model Parameters of Serial Link Systems in SystemSI

    Demonstrating the step-by-step process of setting values of several parameters in the property form of AMI blocks of transmitter and receiver of a serial link system (SLS) in SystemSI, followed by def

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  • Understanding Simulation Analysis Parameters for Serial Link Systems in SystemSI22:05

    Understanding Simulation Analysis Parameters for Serial Link Systems in SystemSI

    Demonstrating the step-by-step process of setting parameters in the analysis options form and property form of the transmitter and receiver of a serial link system (SLS) followed by definition and pur

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  • Understanding Simulation Analysis Parameters for DDR4 Bus Systems in SystemSI16:51

    Understanding Simulation Analysis Parameters for DDR4 Bus Systems in SystemSI

    Demonstrating the step-by-step process of setting timing budget, jitter and several other parameters in the analysis options form, before simulating a DDR4 interface of a layout file, using the System

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  • Understanding Process of Generating Ports in PowerSI15:02

    Understanding Process of Generating Ports in PowerSI

    Demonstration of the step-by-step process for generating ports automatically/manually for extracting S-parameters model of the the power-aware parallel bus interface of a layout file, using PowerSI.

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  • Achieving PCI-e Compliance: Getting it Right the First Time

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  • Understanding PowerSI Generated S-parameters and Circuit Files34:32

    Understanding PowerSI Generated S-parameters and Circuit Files

    Explaining formats and contents of Touchstone and BNP S-parameters data files and circuit files, generated at the completion of the simulation of a layout file in PowerSI.

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  • Understanding Model Connection Protocol in Circuit Files of Blocks in SystemSI8:51

    Understanding Model Connection Protocol in Circuit Files of Blocks in SystemSI

    Demonstrating the step-by-step process of viewing and understanding model connection protocol (MCP) section, generated by default, in circuit files of controller and memory blocks of a parallel bus sy

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  • Understanding EYE, BER and BATHTUB Plots from DDR4 System Simulation18:39

    Understanding EYE, BER and BATHTUB Plots from DDR4 System Simulation

    Demonstrating the step-by-step process of generating 2D plots, Eye diagram, BER and Bathtub plots, based on the sweep mode simulations of a DDR4 interface, using the SystemSI-PBA tool and then explain

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  • Lost in Transmission: Solving Common Issues in High-Speed Design

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  • Rapid Demo of Serial Link Model Generation using PowerSI36:21

    Rapid Demo of Serial Link Model Generation using PowerSI

    Rapid demonstration of step-by-step process for generating S-parameters model of a serial link interface, using PowerSI.

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  • Rapid Demo of Serial Link Model Generation using Cut and Stitch Process in 3D-EM, Part-228:19

    Rapid Demo of Serial Link Model Generation using Cut and Stitch Process in 3D-EM, Part-2

    Rapid demonstration of the step-by-step process of viewing SPD files of cutting zones consisting of different sections of a serial link interface, assigning 3D-EM or Hybrid solver to cutting zones, se

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  • Rapid Demo of Serial Link Model Generation using Cut and Stitch Process in 3D-EM, Part-124:46

    Rapid Demo of Serial Link Model Generation using Cut and Stitch Process in 3D-EM, Part-1

    Rapid demonstration of the step-by-step process of dividing the polygon geometry consisting of the serial link interface of a PCB layout file, previously connected with the coaxial/vertical ports, int

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  • Rapid Demo of Serial Link Model Generation using 3D-EM - Part239:55

    Rapid Demo of Serial Link Model Generation using 3D-EM - Part2

    Rapid demonstration of the step-by-step process for generating S-parameters model of a serial link interface connected with coaxial ports and viewing 3D electric and magnetic field distribution in the

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  • Rapid Demo of Serial Link Model Generation using 3D-EM - Part155:54

    Rapid Demo of Serial Link Model Generation using 3D-EM - Part1

    Rapid demonstration of the step-by-step process for generating S-parameters model of a serial link interface connected with vertical ports and viewing the 3D electric and magnetic field distribution i

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  • Rapid Demo of Parallel Bus Model Generation using PowerSI50:00

    Rapid Demo of Parallel Bus Model Generation using PowerSI

    Rapid demonstration of step-by-step process for generating S-parameters model of a power-aware parallel bus interface, using PowerSI.

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  • Rapid Demo of Generating SPICE Compatible Circuit Model of Parallel Bus using Broadband SPICE Tool23:24

    Rapid Demo of Generating SPICE Compatible Circuit Model of Parallel Bus using Broadband SPICE Tool

    Rapid demonstration of the step-by-step process for generating SPICE compatible equivalent circuit model of a power-aware parallel bus interface, using the precision mode and passivity mode options i

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  • Rapid Demo of Differential Via Model Generation using 3D-EM, Part-238:46

    Rapid Demo of Differential Via Model Generation using 3D-EM, Part-2

    Rapid demonstration of the step-by-step process of setting parameters in the frequency, solver and geometry option forms, generating S-parameters for a pair of differential vias, comparing return loss

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  • Rapid Demo of Differential Via Model Generation using 3D-EM, Part-127:43

    Rapid Demo of Differential Via Model Generation using 3D-EM, Part-1

    Rapid demonstration of the step-by-step process of cutting a polygon geometry consisting of a pair of differential vias, connecting vertical ports at the differential vias, editing the width of ports,

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  • Modifying MCP Header of the W-Element Transmission Line Model in SystemSI7:00

    Modifying MCP Header of the W-Element Transmission Line Model in SystemSI

    Demonstrating the step-by-step process of modifying MCP (model connection protocol) header, created by default in a circuit file, considering the example of the W-Element transmission line model file

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  • Impedance Characterization of PCB Power-Ground Planes, using Extraction Mode of PowerSI Part-128:28

    Impedance Characterization of PCB Power-Ground Planes, using Extraction Mode of PowerSI Part-1

    Demonstration of impedance characterization process for the open-circuited PCB-level power distribution network, considering adjacent power-ground planes as a cavity, computing open-circuit cavity cap

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  • Impedance Characterization of PCB Power-Ground Planes using Extraction Mode of PowerSI, Part-336:51

    Impedance Characterization of PCB Power-Ground Planes using Extraction Mode of PowerSI, Part-3

    Demonstration of impedance characterization process for the PCB-level power distribution network, first added with an ideal capacitor and then a real capacitor between the power-ground planes; analyzi

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