Issue link: https://resources.pcb.cadence.com/i/1532920
Other High-Speed Constraints Wiring topology Set specific routing paths for technologies like DDR3 and T-branch to minimize signal attenuation due to PCB material properties. Or Daisy Chain or star topologies. Diagram showing the prioritized routing of critical nets on a PCB Definition: Wiring topology involves organizing the connections between different nets on a PCB to achieve a certain outcome, such as minimizing signal reflections, signal attenuation or voltage drops. Example: Let's ensure that a pulse-width modulated net follows a daisy-chain topology. Steps: 1. Open the Constraint Manager, then go to the Electrical > Electrical Constraint Set > Routing > Wiring spreadsheet. 2. In the Schedule column, you can right click your DSN cell, create a new Electrical Constraint Set (ECS). Notice in the image below, we have multiple ECSets already declared. 3. Select the drop-down in one of the cells in the Schedule column and you can choose your net topology. You have options such as: f Minimum Spanning Tree f Daisy-chain f Source-load Daisy-chain f Star f Far-end Cluster f (Clear) 16 www.cadence.com OrCAD X Constraint Management Guide