Issue link: https://resources.pcb.cadence.com/i/1180268
Working with IDF Best Practices: Working with IDF October 2019 1 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Best Practices: Working with IDF Introduction Today's printed circuit boards require tighter integration between electrical engineering and mechanical engineering. This is a result of increasing component density and mechanical complexity, as well as an increasing number of mechanical constraints such as PCB outline, holes, slots, cutouts, keepouts, interconnects, heatsinks, and so on. In the past, most ECAD engineers created board outlines from paper drawings that were created by MCAD engineers. Now, this error-prone and time-consuming task can be simplified and automated using the Cadence IDF 3.0 translator. For additional information, see Intermediate Data Format in the Allegro PCB and Package User Guide: Transferring Logic. This paper describes the process of transferring data between Allegro PCB Editor and PTC Pro/ENGINEER™ using the Cadence IDF 3.0 translator. It also: ■ Describes the basic flow of importing and exporting data, including using front-end tools such as Allegro Design Entry HDL. ■ Explains how information is interpreted by Allegro PCB Editor. ■ Shows how Allegro PCB Editor and Pro/ENGINEER detects changes. Acknowledgements This Best Practices paper is based on the paper, "Electromechanical Design: Integrating Mechanical Design and PCB Layout with Cadence's IDF 3.0-Based Translator" written by Andreas Kulik and Andy Roemer of LTX Corporation of Westwood, Massachusetts. Cadence Design Systems is grateful to the authors and LTX Corporation for providing us with this information. The Best Practices paper also draws information from the following sources: ■ IDF 3.0 Specification – www.intermedius.com ■ Pro/ENGINEER Online Documentation – www.ptc.com ■ Cadence Research and Development; Marketing