High-Speed Design
Optimize Reliable Signals to Ensure Peak Performance
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Allegro PCB Editor Demo
The Cadence® Allegro® PCB Editor helps bring your innovative and bleeding-edge designs to life.
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Allegro PCB Editor: The Ultimate PCB Design Experience
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Split Plane Routing in Cadence’s Allegro PCB Editor
Split plane routing is essential with today’s high-density PCB designs, but there are some potential pitfalls to using them if you aren’t careful.
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Functional Partitioning in PCB Design
We’ll illustrate the importance of setting up functional partitioning in PCB design and give some recommendations on functional partition best practices.
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Managing Magnetic Coupling on a Printed Circuit Board
Magnetic coupling is a different animal. A moving electrical charge will generate a magnetic field as a byproduct. The magnetic fields can be quite powerful though their effect drops off rapidly.
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Different Types of Shielding in Analog Layouts to Consider for PCB Design
This article talks about the different types of shielding in analog layouts that are important for controlling EMI in circuit boards.
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Achieving PCI-e Compliance: Getting it Right the First Time
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How to Use a Transmission Line Reflection Coefficient Correctly
There is more than one way to examine how the transmission line reflection coefficient affects your signals.
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Simplify RLC Circuit Analysis with the RLC Transfer Function
Conduct RLC circuit analysis using the RLC transfer function.
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Efficient Differential Pair Routing Guidelines to Speed Up PCB Routing
This article describes some of the potential problems of routing diff pairs on a PCB and offers some differential pair routing guidelines to get you through.
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Lost in Transmission: Solving Common Issues in High-Speed Design
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What’s a 4-Pin PWM Header and How Does It Work?
A 4-pin PWM header works to balance noise and PC temperature—read on to learn more about the benefits of 4-pin PWM headers and what you need to design a fan controller.
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Balancing Multilayer Circuits with Plated Holes: Placement and Information
Trying to balance space on multilayer circuits with plated holes can be a challenge, especially on dense PCB designs. Here are some ideas that can help.
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How to Reduce Stray Capacitance in Electronic Circuits
Learn how to reduce stray capacitance in electronic circuits, how it occurs, and strategies to avoid it to ensure performance in your high-speed designs.
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How the PN Junction Depletion Region Impacts Your Board Design
Knowing how the PN junction depletion region works can help improve your PCBA layout, as we explain in this blog.
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Biodegradable Flexible Electronics: A New Option for Greater Sustainability
Biodegradable flexible electronics increase Design for Environment and Design for Sustainability opportunities while promising to revolutionize electronic product design.
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Optimizing PWM DAC Filter Design and PCBA Layout
PWM DAC filter design optimization can be simple with the right objectives and the best tools, as we discuss in this blog.
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Paper Circuit Boards: The Future of PCB Design
This article discusses the different technologies that make paper printed circuit boards a viable option for future products.
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Using Bode Plot High Pass Filter Parameters to Improve PCBA Design
A Bode plot high pass filter design is not only for choosing components. It can also aid in laying out your board, as described in this article.
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Managing High-Density Vias
This article discusses the problems of managing high-density vias in an HDI PCB design, as well as offering some potential management solutions.
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Impedance vs Resistance: Which is Most Important for PCB Layout?
Impedance vs resistance? Is one more important for laying out your board? The answer is clearly explained in this blog.
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Mean Time Between Failure (MTBF) and Its Importance to Device and System Design
Effectively using MTBF assessments can lead to increased design accuracy, cost-effectiveness, and reliability.
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PCB Layout Constraint Management for Optimal Designing
This article describes layout constraint management in PCB design, it’s importance, and some of the benefits that constraint management in layout will yield.
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