Cadence PCB Best Practices

Working with Design Partitions October 2019 4 Product Version 17.4-2019 © 1999-2019 All Rights Reserved.

• Cover
• Contents
• Design Partitioning
• Licensing
• Terminology
• Command Location
• Understanding Team-based Applications and Restrictions
• Getting Started: Generating Partition Areas
• Editing and Deleting Partition Areas
• Partition Area Naming Convention
• Partition Strategy for Component Placement
• Partition Strategy for Routing
• Partition Strategy for Testability
• Parameters
• Properties
• DRC
• Potential Team Issues
• Final Steps
• The Team Design Process
• Flexible Boundaries
• Constraint Editing
• Exporting Partitions
• File Management Considerations
• The Allegro Partition Editor
• Refreshing Partitions
• Progress State
• Retracting Partitions
• Example: How to Recover an Obsolete Partition
• Frequently Asked Questions