System Capture RAKs

Reuse Flow in Allegro Design Entry (Capture CIS)

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Reuse Flow in Allegro Design Entry CIS (Capture CIS) – Allegro PCB Editor Learn more at Cadence Support Portal - https://support.cadence.com © 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Page 15 Placing Hierarchical Block: 1. Choose Place -- Hierarchical Block to open the Place Hierarchical dialog box. Specify the fields of the dialog box, as shown in the following figure. Reference is user defined Implementation Type will be Schematic view as you are referencing a schematic design file Path and file name: Browse to bot1.dsn. While browsing, make sure that Files of Type is set as .dsn. Implementation name is the name of the schematic folder, voldiv in this case, which contains the schematic which is being referred. 2. Click OK and a crosshair is attached to the mouse pointer. 3. Click on the schematic page and drag to create the H-block. You can right-click a H-block and choose Descend Hierarchy to view the referenced schematic. This H-block will get Hierarchical pins (H-pins) on the inner side of the H-block boundary. These H-pins are connectivity points on this main design from the referenced design. R1, connected to OUT H-pin, will get connected to resistors in bot1.dsn.

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