Reuse Flow in Allegro Design Entry CIS (Capture CIS) – Allegro PCB Editor
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This option assigns unique references to the components in the main design (top.dsn
here). The components within the referenced schematic will also get unique references
for this main design.
If you open bot1.dsn and bot2.dsn independently, both have components with
references R1 and C1. So if these designs are referenced in a third design (here
top.dsn), it will have duplicate references. Similarly, top.dsn can also have some
components with references which may be duplicate with the referenced designs.
Checking this option assigns unique references to the components in the referenced
design, making sure that top.dsn (itself and all referenced design) does not have any
duplicate references.
This option is available release 16.6 onwards. Earlier releases did not have this option.
So, in earlier releases it is recommended not to use the Auto reference feature. Else,
later in the design cycle, manual editing of references may be required to avoid
duplicate references.
1. Complete the design as shown in the following image. This will require you to
place a hierarchical block referencing bot1.dsn and the hierarchical part from
bot2.olb.
