Issue link: https://resources.pcb.cadence.com/i/973626
©2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and OrCAD are registered trademarks and the OrCAD logo and Sigrity are trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners. 5271 10 /15 SC/ DM / PDF www.orcad.com OrCAD Sigrity ERC Advanced signal quality checking OrCAD Sigrity ERC also includes a simulation-based rule checking (SRC) environment. This net-level PCB layout checking engine is based on time-domain simulation, and considers: • Loss • Delay • Reflections due to termination and impedance discontinuities • Trace couplings • Via coupling SRC setup is easy, with voltage pulses as stimulus representing signal amplitude, data rate, rise/fall time, and driver/receiver terminations. Device simulation models are not needed. After SRC simulation, TX, RX, NEXT (near end xtalk), and FEXT (far end xtalk) waveforms are available, as well as SI metrics calculated using RX and FEXT waveforms as signal quality indicators. ERC and SRC Solutions and Flows With easy setup and fast simulation, OrCAD Sigrity ERC enables practical first-order screening of electrical issues before handing off to SI experts for final check (see Figure 3). For example: • Use ERC to screen layout and identify the worst case for further SRC or SI analysis • Use SRC to evaluate the SI impact of design rule violations and investigate tradeoffs • Use ERC to find out how to fix SI problems shown in SRC or SI simulations • Compare ERC and SRC results with known-good reference design and the part of the design that has been fully analyzed Sales, Technical Support, and Training The OrCAD product line is owned by Cadence Design Systems, Inc., and is supported by a worldwide network of Cadence Channel Partners (VARs). For sales, technical support, or training, contact your local channel partner. For a complete list of autho- rized channel partners, visit www.orcad.com/CCP-Listing. ... And more coupling More impedance discontinuities Less impedance discontinuities Less coupling More coupling ERC shows the shorter (blue) data signals have more impedance discontinuities ... 2 1 3 SRC shows the shorter (blue) data signals have more FEXT SRC/ERC example Figure 3: SRC/ERC example