Issue link: https://resources.pcb.cadence.com/i/973626
OrCAD Sigrity ERC 2 Features Electrical rule check for PCB layout designers OrCAD Sigrity ERC is an easy-to-use reference-aware trace impedance, coupling and reference check tool for advanced PCB layout signal quality checking. Three options are available: • Check all nets • Check selected nets • Check by net groups OrCAD Sigrity ERC produces the impedance and coupling overlay, where layout traces are color-coded with impedance and coupling coefficient values. The overlays clearly show increased impedance and coupling due to voids on reference planes, which would be practically impossible to identify on the board level with visual inspection. See Figure 1. Comprehensive results tables OrCAD Sigrity ERC also generate comprehensive results tables (see Figure 2): • Trace segment-by-segment results – Reference-aware impedance – Reference-aware coupling – Upper/lower layer reference – Coplanar reference • Net-level results – Impedance summary – Coupling summary – Length and delay – R, L, and C – Number of reference discontinuities – Number of no reference sections – Number of vias • Board-level results – Routing area – Component placement area – Routing efficiency Layout view shows same trace impedance OrCAD Sigrity ERC reference-aware impedance shows reference discontinuities OrCAD Sigrity ERC reference-aware coupling shows increased coupling 1 …due to voids on reference planes 4 2 3 Figure 1: OrCAD Sigrity ERC reference-aware impedance/coupling overlay Figure 2: OrCAD Sigrity ERC delivers comprehensive results tables with actionable results