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Designing for Efficiency
Time-Step Resolution
Switching loss and efficiency measurements are sensitive to time resolution. If the simulation time step is too large, fast
transitions may be under-sampled, distorting the loss waveforms relative to those shown in Figure 2.
To ensure accurate results:
f
Set the maximum time step significantly smaller than the switching period
f
Confirm that switching edges are well resolved in the waveform viewer
f
Use identical time-step settings for both Si and SiC simulations
Steady-State Verification
Efficiency must be measured only after periodic steady state is reached.
Before recording measurements:
f
Confirm that output voltage ripple is stable and repetitive
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Verify that device loss waveforms repeat consistently
f
Ensure cursor placement avoids startup transients
If steady state is not reached, extend the simulation run time rather than measuring prematurely.
10. Conclusion
Substituting SiC devices in a push-pull converter produces significant efficiency and thermal benefits. Transformer optimi-
zation further enhances performance by ensuring that magnetic losses do not limit system gains. A simulation-first workflow
enables informed engineering decisions, reduces hardware iteration risk, and allows designers to evaluate device tradeoffs
quantitatively before committing to physical prototypes.
11. Accessing the Reference Design
Download the full reference design.
