High-Speed Simulation and Verification
While understanding that coupling and impedance are valuable, we need to know if certain signals genuinely pose a problem
in the current layout. To find out, we must see the signal behavior on traces of interest. The best way is through transmission
line simulation and eye diagram analysis. We will show you how to verify signal behavior with special tools in OrCAD X.
Signal Reflection Analysis
Let's check a clock signal to see if it has issues:
1. Go to Tools > Constraint Manager.
2. Select a clock net from within the Electrical > Electrical Constraint Set > Vias worksheet, then right click and select
Explore Topology. Alternatively, you can highlight the net, then while highlighted (in blue) click the Constraint Manager's
menu Tools > Explore Topology.
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OrCAD X High-Speed Digital Design Guide
