Issue link: https://resources.pcb.cadence.com/i/1436025
The Customer The National Institute of Nuclear and Particle Physics (IN2P3) of the Centre National de la Recherche Scientifique (CNRS) promotes and unifies research activities in nuclear, particle, and astroparticle physics. Founded in 1971, IN2P3, working in partnership with CEA (French Alternative Energies and Atomic Energy Commission), coordinates programs in these fields on behalf of CNRS and universities. To perform its scientific explorations, IN2P3 relies on a variety of very large instruments and infrastructures, including particle accelerators and detectors that are space-based, ground-based, or even undersea. In particular, scientists at IN2P3 utilize the world's largest and highest energy particle accelerator, the Large Hadron Collider (LHC), located close to Geneva, Switzerland. The collider, which consists of a circular accelerator 27km long with six detectors along this ring, was built by the European Organization for Nuclear Research (CERN) to provide physicists with a tool to test the predictions of different particle physics and high-energy physics theories. Because of detector complexity (each consists of millions of channels) and the high performance required to process huge amounts of data in real time, FPGAs are at the heart of most of the electronics systems developed to operate the system. Recently, two of IN2P3's research teams involved in the readout and supervision system of the LHCb experiment on the LHC developed boards with large FPGAs. IN2P3 and Cadence "I appreciate the high level of abstraction that Allegro FPGA System Planner provides. With a top view of our design, we get a clear picture of the relative placement of the FPGA with other components on our board, and we can quickly scale between smaller and larger FPGAs." Daniel Charlet, Design Engineer, IN2P3 Business Challenge • Enhance ability to meet aggressive deadlines for particle physics research projects Design Challenges • Automate aspects of FPGA board design, including pin placement and routing schemes • Quickly select the optimal FPGA package and pin count for the design • Quickly determine the right FPGA configuration and component setup for the design Cadence Solutions • Allegro FPGA System Planner • Allegro Design Authoring • Allegro PCB Designer • Allegro PCB SI Results • Saved one to two months based on FPGA interconnect density on manual FPGA design-in effort for initial design • Made late changes to the design easily and in hours vs. weeks • Reduced design iterations and, as a result, costs • Saved one month of project time due to co-design development ability