Issue link: https://resources.pcb.cadence.com/i/1436025
Cadence Design Systems enables global electronic design innovation and plays an essential role in the creation of today's electronics. Customers use Cadence software, hardware, IP, and expertise to design and verify today's mobile, cloud and connectivity applications. www.cadence.com © 2013 Cadence Design Systems, Inc. All rights reserved. Cadence, the Cadence logo, and Allegro are registered trademarks of Cadence Design Systems, Inc. All others are properties of their respective holders. 782 06/13 CY/ LX / PDF design iterations—a scenario that's unavoidable with manual approaches. What's more, the teams are equipped to make late changes to their designs in hours, rather than the weeks it would take if they were using manual processes. Since pin assignment is optimized for routing at the start, IN2P3 anticipates requiring fewer layers on its FPGA-based boards, which translates into less expensive boards. Said Charlet, "Instead of starting with FPGA code and forcing pin assignments onto the schematic engineer and FPGA designer, we can plan pin assignments first using Allegro FPGA System Planner and then move to RTL code—true FPGA and PCB co-design. With pin coding established at an abstract level, we can save one or two months of work. Considering that our FPGA-based design has around 800 pins, the impact is substantial." Summary and Future Plans A tool like Allegro FPGA System Planner provides the IN2P3 teams with the flexibility to more efficiently upgrade or reconfigure their FPGA-based systems, without having to start from scratch. They can reassess pin assignments and connectivity in just a couple of hours, compared to the upwards of 10 hours if they had to do this manually on their particular designs. The teams expect to build on their expertise with the Allegro tool to gain more efficiencies with future FPGA designs.