Cadence PCB Best Practices

Electrical Design, Mechanical Design Incremental Data Exchange in Allegro PCB Editor October 2019 19 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. (Package_Height_Min) value of another symbol, and pin to pin rules are not violated, no violation will be reported. Vias Vias are exported as through holes with X-Y location and drill size values. No pad or net structures are associated to the hole. Vias are filtered from export/import by default. Hole Mapping Plated and non-plated holes passed to Allegro PCB Editor through IDX that are not identified through the MCAD tools. Mapping file are generated in Allegro PCB Editor as a mechanical symbol. When these symbols are created, they include keep-out areas, pad stack, and are given a default name.

• Cover
• Contents
• Electrical Design, Mechanical Design Incremental Data Exchange (IDX)
• Introduction
• ECAD/MCAD Library Synchronization
• EDMD Schema Design Data Cycle
• MCAD to Allegro with MCAD Baseline Initiation
• Allegro to MCAD with Allegro Baseline Initiation
• Incremental Changes
• Final Baseline - Re-baseline
• IDX Filter
• IDX Data
• The Baseline File
• Incremental Files
• Transaction Files
• IDX Properties
• Object Mapping
• Board Outline
• Keep-in Areas
• Keep-Out Areas
• Height Restriction Management
• Vias
• Hole Mapping
• Allegro Symbol Exported Data
• Allegro IDX Settings
• PTC's Creo Parametrics Configuration Settings
• Configuration Variables
• Configuration Parameters
• Drawing objects