Cadence PCB Best Practices

Constraint Compiler User Guide

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Allegro Constraint Compiler User Guide Allegro Constraint Compiler October 2019 20 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Sample Object Table Compiler Results ■ Selected net names: HD0, HD1, HD2, HD3, HD4, … HD31 ■ Spacing Net Class HS-PORT_DATA that contains nets HD0, HD1, HD2, HD3, HD4, … HD31 assigned to rule set HS_SPACE from the SPC rule specification. When imported into Constraint Manager, ❑ Net Class name starts with prefix NC_ ❑ Spacing CSet name starts with prefix SCS_ ■ Differential pair HS-PORT_DP with members HSON(0) and HSOP(0) assigned to rule set HS_DIFFP from the PHY rule specification. When imported into Constraint Manager, ❑ Differential pair name starts with the prefix DP_ ❑ Physical CSet name starts with the prefix PCS_ Rule Specification Table The Rule Specification table is used to capture Electrical, Physical and Spacing requirements to create an associated Constraint Set in Constraint Manager. Physical and Spacing rules

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