Issue link: https://resources.pcb.cadence.com/i/1180264
Working with Backdrilling Backdrilling October 2019 46 Product Version 17.4-2019 © 1999-2020 All Rights Reserved. Tip It is recommended to enable Suppress backdrilled pads in the Backdrill Setup and Analysis form to avoid a larger than expected clearance at backdrill locations based on the pin/via to copper spacing constraints and to prevent an internal pad being present during manufacturing output. One of the common fabrication vendor requirements is that the internal layer pads at the backdrill locations are removed in the manufacturing output. Board Testability The decision to backdrill may impact your in-circuit test strategy. Any pin or via tagged as a test point is not backdrilled from that side. This could cause a significant reduction in test coverage as most test points are placed on pin and via objects. You can take advantage of adding test points directly on outer layer traces wherever it is feasible to do so. Tip Automatic and manual test point generation are backdrill aware so there is no chance of marking a pad as a test point which will be backdrilled during fabrication.