Reuse Flow in Allegro Design Entry CIS (Capture CIS) – Allegro PCB Editor
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Creating Schematic for Reuse Flow
After creating a schematic in Capture and then generating the board in PCB Editor, you
can convert the design to a reuse module. A reuse module can be referenced or used in
a different or external design either as a hierarchical block (H-block) or hierarchical part
(H-part).
Using hierarchical block (H-block): An H block can be directly placed in a design
using the Place – Hierarchical block menu. H block can refer to the reuse the
design. It is not required to create the H-block in advance in this methodology.
Using Hierarchical part (H-part): An H-part is generated by creating the module
as a library part using Generate Part in Capture. The part can then be placed in a
design using Place Part.
Preparing the Design for Reuse
You must make sure that the design for reuse and its corresponding board file are
complete and in sync. To prepare a design for reuse:
1. Annotate the design in Capture to ensure that there are no duplicate references.
2. Run DRC to correct any errors and warnings.
3. Generate the board for the design.
4. Complete placement and routing in PCB Editor
5. Backannotate any changes done in board file, such as pin or gate swaps, to the
schematic.
6. Similarly, synchronize the board for any changes in the schematic.
The designs with this RAK, bot1.dsn and bot2.dsn, are annotated and checked for
DRCs
You will prepare the test designs for reuse and then netlist these designs to create
board files and the reusable module, .mdd file. You will use this module (*.mdd) in the
top level/main board.
