Issue link: https://resources.pcb.cadence.com/i/1544351
7. The Constraint Set will create a column where you can populate values (see below). 8. Set the minimum clearance value (typically 8 mils (0.2032 mm), as per Sierra Circuits manufacturer recommendation). 9. Apply the constraint to the entire design by going to Manufacturing > Design for Fabrication > Design > Copper Spacing. 10. Then in this spreadsheet, in the All column, set the 'Referenced DFF CSet' field to the one we just created (DFFCSCS1). 11. The value for the 'All pin pads to Trace' rule will populate (0.203 mm / 8 mils) as intended. Now all pin pads will flag an error in the PCB design rule check if closer than 8 mils to a trace. Impact: Adequate spacing helps prevent issues like short circuits or weakened connections due to misalignment during drilling. Therefore getting this correct ensures manufacturability, improves yield, and enhances the overall reliability of the PCB. 30 www.cadence.com OrCAD X Constraint Management Guide