OrCAD X Resources

Pin Properties – Shapes 86 www.cadence.com OrCAD X Constraint Management Guide

• DG-ORCDX-CNSTMG-cover
• orcad-x-constraint-management-guide-part-1
• Part 1 - Introduction to Constraint Management
• What is Constraint Management?
• Problems Solved by Constraint Management
• Benefits of Proper Constraint Management
• Applications of Constraint Management
• Finding the Constraint Manager (CM)
• Understanding How the Constraint Manager Works
• Types of Constraints
• Electrical Constraints
• Physical Constraints
• Spacing Constraints
• Manufacturing Constraints
• High-Speed Design Constraints
• Understanding Net Classes, Net Groups, and Regions in PCB Design
• 1. Net Classes
• Example - Creating a Net Class
• 2. Net Groups
• Example - Create a Net Group
• 3. Regions
• Region Physical Constraint Set
• Region Spacing Constraint Set
• Manual Constraint Entry vs. Constraint Sets
• Applying The Constraint Region
• Key Differences and Implications Among Net Classes, Groups, and Constraint Regions
• Summary
• Conclusion to Part 1
• orcad-x-constraint-management-guide-part-2
• Part 2 - Standard Constraints
• Physical and Spacing Constraints
• Trace Width: Minimum and Maximum Width for Signal And Power Traces.
• Via Size: Diameter and pad size for vias, including microvias and blind/buried vias.
• Differential Pairs (Basic Setup)
• Creating a Diff Pair
• Spacing Constraints
• Creepage and Clearance: Minimum Distances Between Conductive Elements to Prevent Electrical Arcing
• Component Spacing: Minimum Distances Between Components to Avoid Interference and Facilitate Cooling
• Manufacturing Constraints
• Fabrication Tolerances: Allowable Variations in Dimensions for Manufacturing
• Board Outline Dimensions: Tolerances for Overall Board Size and Shape
• Trace Width for Manufacturing: Minimum Copper Width for Traces
• Trace Spacing: Minimum Distance Between Copper Features
• Annular Ring: Minimum Width of Copper Surrounding a Hole
• Drill to Copper Spacing
• Teardrops (Fillets)
• Pad To Mounting Hole Spacing: Minimum Distance Between Pads and Mounting Holes
• Acid Traps: Avoiding Acute Angles in Copper Features That Can Trap Etching Chemicals
• Minimum Copper Area: Smallest Allowable Area of Isolated Copper Features
• Assembly Constraints: Rules for Component Placement, Orientation, and Soldering
• Outlines and Cut Outs
• Where to Apply the Constraint Set
• Package to Package Spacing
• Component Spacing to PCB Features
• Pastemask
• Silkscreen and Solder Mask: Specifications for Text and Mask Application on The PCB.
• Design for Test (DFT) Constraints
• Test Points: Placement and Minimum Distances From Other Test Points and Components
• 3D Constraints
• Rigid Flex PCB Constraints
• Teardrops (Fillets)
• Component to Flex PCB
• Conclusion
• orcad-x-constraint-management-guide-part-3
• Part 3 - Advanced Constraints
• Constraint Modes
• Signal Integrity
• Impedance Control: Specification for controlled impedance traces for high-speed signals
• Crosstalk Mitigation: Maximum parallel trace length
• EMC and EMI
• Return Path
• High-speed constraints/electrical design rules:
• Min/max relative propagation delay: Controlling signal timing
• Critical Trace Length
• Length Matching
• Differential pairs (High-Speed)
• Other High-Speed Constraints
• Wiring topology
• Stub limits (Max Stub Length)
• Maximum stub exposed length
• Layer restrictions
• Maximum Via Count
• Example Constraints for Common Applications
• USB (Universal Serial Bus) Constraints
• Double Data Rate (DDR) Constraints
• Rigid-Flex PCB Constraints
• RF (Radio Frequency) Circuit Constraints
• Conclusion of Part 3 - Advanced Constraints
• orcad-x-constraint-management-guide-part-4
• Part 4 – Constraints Optimization
• Constraint Efficiencies
• Constraint Sets
• Modular Approach To Constraint Management
• Schematic to PCB Constraints
• Importing and Exporting Constraints
• Conclusion to Part 4 - Constraints Optimization
• orcad-x-constraint-management-guide-part-5
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• Part 5 – Project Example in OrCAD X
• Hardware Design Project
• Modern Hardware Design Process
• Organize the Nets
• Define Net Classes
• Define Net Groups
• Decide On Constraint Regions
• Setting Spacing Regions
• Schematic Constraints Overview
• Electrical Constraints
• Physical Constraints
• Physical Constraint Set
• Applied Constraint Set
• Spacing Constraints
• Spacing Constraint Set
• Electrical Properties
• PCB Constraints Overview
• PCB Stack up
• Opening The Constraint Manager (PCB Side)
• All Constraints for Analysis
• Applying Standard PCB Constraints
• Trace Width
• Differential Pairs
• Physical Region
• Applying High-Speed and Advanced Constraints
• Advanced Constraints Application
•  Advanced Electrical Constraints
• Wiring topology
• Stub Length (Max Stub Length)
• Maximum Exposed Length
• Maximum parallel trace length
• Layer restrictions
• Maximum via count
• Characteristic impedance
• Propagation delay modeling
• Total etch length limits
• Differential pair rules
• Relative signal velocity
• Return path management
•  Advanced Physical Constraints
• Trace Width
• Differential Pair Advanced Physical Constraints
•  Advanced Spacing Constraints
• Class-to-Class Spacing for Differential Pairs to Differential Pairs Spacing
• Constraint Region
•  Advanced Same Net Spacing Constraints
•  Advanced Manufacturing Constraints
• Design for Fabrication Constraints
• Design for Assembly Constraints
• Design for Test Constraints
•  Advanced 3D Constraints
• Component to Component
• Component to Board
• Component to Rigid-Flex
• Component to Board Edge
•  Advanced Properties
• Electrical Properties
• General Properties
• Route/Vias Keepout Exception
• Component Properties – General
• Component Properties – Thermal
• Component Properties – Swapping
• Component Properties – Reuse
• Pin Properties – General
• Pin Properties – Shapes
• Pin Properties – Manufacturing
•  Advanced DRCs
• Constraint Analysis
• Final Constraint Design Rule Check
• Board Simulation (Impedance and Crosstalk Analysis Using Sigrity X Aurora)
• Impedance Workflow
• Coupling Analysis for Crosstalk
• Conclusion of Part 5 - Project Example
• Conclusion - Next Steps
• Appendix