Part 3: Simulation, Analysis, and Verification
After setting constraints and routing, we need to verify the signals in a design. Typically, you want to do the following kinds of
analyses: signal integrity, electromagnetic compatibility, high-speed signal timing, and power integrity.
Signal Integrity Analysis
Signal integrity (SI) is a cornerstone of high-speed PCB design, ensuring that signals are transmitted without distortion or
degradation. For our FPGA with DDR2 and DDR3 memory project, maintaining SI is critical for avoiding timing errors, data
corruption, and performance issues. Proper SI analysis helps identify and mitigate issues such as reflections, crosstalk, and
impedance mismatches.
General Solution
Signal integrity analysis involves both pre-layout and post-layout simulations. Pre-layout analysis helps define constraints
such as impedance targets and trace lengths, while post-layout analysis verifies that the implemented design meets these
constraints. Tools like OrCAD X Presto provide integrated workflows for identifying and resolving SI issues.
Signal Integrity Analysis Conditions:
1. DDR3 Parameters:
ɢ Rise time: 200ps
ɢ Operating frequency: 800 MHz
ɢ Voltage swing: 1.5V
2. Critical Analysis Points:
Clock Analysis:
ɢ Clock to DQS skew
ɢ Clock tree delay
ɢ Crosstalk on CLK pairs
Data Group Analysis:
ɢ Setup/hold margins
ɢ Reflection analysis
ɢ Crosstalk analysis
Impedance Analysis
The lowest hanging fruit to simulate for is trace impedance.
First, ensure you have the appropriate version of Sigrity X Aurora installed on the computer. For example, if you're using
OrCAD X version 24.1, then you must use Sigrity X Aurora 24.1, and not some other version like 23.1 or 24.0.1.
Once installed, you're ready to run analyses on your PCB.
3 www.cadence.com
OrCAD X High-Speed Digital Design Guide
