Issue link: https://resources.pcb.cadence.com/i/1533020
By that time, the database has become something of a stranger. It might even be someone else's project when the revision hits. That is when capturing the relevant geometries up front helps keep the job from going sideways. Using the example of a net short is a way to emphasize that the exception to the established rules could be even more important to document than the mundane spacing requirement. Whatever it is that you're trying to do, there's probably a way to save the underlying requirements. Design Constraints - When Is It Too Much of a Good Thing? Some requirements have multiple ways of being implemented. The length of a trace can be controlled with a minimum and/or maximum length. It could also be part of a group that is length-matched to one of its several members. Two nets can be related as a differential pair and have their own rules governing their behavior with regard to each other. For example, the maximum uncoupled length of the pair can be assigned which would limit the phase-matching bumps. The rules can be at odds with each other, so we have to be careful not to over-constrain the design. Figure 4. The PCB Outline can have a large impact on the placement and routing challenges. Once in a while, we get to have a little fun with the silkscreen layer. Image Credit: Author Eventually, the solution may involve compromise where the design rules were aspirational rather than achievable. If you're given a design where the rules are too restrictive, the team has to hear from you about it. Negotiations on design rules are part of a successful project. I had a Regulatory Engineer who worked out on the other coast. We were designing edge routers that had the power supply on the same board as the processors. This power circuit had the fist-sized transformer and an inductor almost as large. It's not often that you see a 12-layer logic board that is also used as a main power supply. My man from Rochester insisted that there were sufficient rules for the power supply that it would flag anything that did not meet the conditions that he had spelled out on the schematic. That is when I had to up my game on air gaps as well as widths on a pin-to-pin basis. After that, a memory bus seemed easier. With this introduction, I'm going to jump into placement and routing to shine a light on some of my favorite design constraints using the Cadence OrCAD X/Allegro X Design Platform. The goal is to drive a design that meets the requirements in a way that can be easily verified. The constraint manager is the insurance policy that helps you deliver the goods. 4 www.cadence.com Introduction to PCB Constraints