APPLICATION NOTE
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under-voltage lockout, featuring start up current of less than 1mA, a precision reference trimmed for
accuracy at the error amp input, logic to insure latched operation, a PWM comparator which also provides
current limit control, and a totem pole output stage designed to source or sink high peak current. The
output stage, suitable for driving N-Channel MOSFETs, is low in the off state.
Limitation
This is a conceptual design created to demonstrate capabilities of the tool.
Simulation of VRM Module
Simulation with Ideal Components
First step of the design procedure is to verify block-level implementation and gather high-level
specification for various devices required for real life implementation. For that you will capture the block
diagram shown in Figure 4 using ideal devices. Ideal devices can be found in following three libraries:
/tools/capture/library/PSpice/analog.olb
/tools/capture/library/PSpice/source.olb
/tools/capture/library/PSpice/breakout.olb
Components from these libraries are meant for basic design simulation in ideal conditions. These
components do not have any limitations, such as switching delays, leakage inductances, and winding
resistances.
Figure 4: VRM Circuit
Figure 5 shows the current waveform through various power devices.
