Issue link: https://resources.pcb.cadence.com/i/1480204
APPLICATION NOTE 4 Single-Event Upset Single-Event Upset (SEU) occurs when a high-energy ionizing particle, such as heavy ions, alpha particles or protons, irradiates a circuit or passes through an integrated circuit causing a disruption in the system logic. The most common effects of SEU are logic upsets in high-density digital circuits particularly memories and the registers in microprocessors. Exact upset levels are very difficult to predict because of the complex nature of the physical mechanism involved. However, simulations can aid greatly in evaluating design and process changes to increase the hardness of the circuit to this type of event. One analysis procedure for SEU is similar to that used for doserate effects discussed earlier. A current generator is inserted in the circuit description to model the charge collected on an assumed susceptible node as a result of the particle hit. The following equation gives an analytical approximation for this current: where: Io is approximately the maximum current, theta is the angle of incidence of the particle to the surface of the circuit, α is a collection time constant of the junction, and β is the time constant of initially establishing the ion track. Io varies according to particle type and is proportional to the energy of the particle and the doping profile of the semiconductor material. The total current increases as the angle of incidence varies from grazing to near normal. The following example demonstrates how PSpice can be used to perform the Analysis of Single Event Upset: .PARAM IO = 1E-3 ; approximate peak current .PARAM ANG = 1.3 ; angle of incidence (in radians .FUNC ISEU(IO,ANG) IO*(EXP(-TIME/150PS)-EXP(-TIME/40PS))/COS(ANG) .STEP PARAM IO LIST 1E-3 3E-3 1E-2 GSEU 1 1 0 VALUE={ISEU(IO,ANG)} The .FUNC statement is used to define the SEU current as a function of the peak current, Io, and the incidence angle, ANG. Using the Analog Behavioral Modeling extensions, a current source GSEU is included in the circuit description to represent the charge collected on the susceptible node. Figure 4: Circuit Design for Single-Event Upset