APPLICATION NOTE
2
Variable Q RLC Network
The first and second connections to the ZX subcircuit are the control input, followed by a connection to the
reference component and then, finally, the two connections for the floating impedance.
The Variable Q RLC circuit is simulated for 4ms (Run to time) along with parametric sweep, varying Vin
(Vcontrol) from 0.5V to 2V in steps of 0.5V. Select PSpice – Edit Simulation Profile for the simulation settings
window.
Using a 0.5 ms wide pulse, the transient analysis of the circuit shows how the ringing differs as the Q is varied
by X_VCRes. Figure 2 shows the input pulse and the voltage across the capacitor C1. Comparing the four output
waveforms, we can see the most pronounced ringing occurs whenX_VCRes has the lowest value and the Q is
greatest. Any signal source can be used to drive our voltage-controlled impedance. If we had used a sinusoidal
control source instead of a staircase, the resistance would have varied dynamically during the simulation.
Voltage-Controlled Wien Bridge Oscillator
In this example, we will use a voltage-controlled capacitor to adjust the frequency of oscillation for a Wien bridge
oscillator.
A simplified operational amplifier (opamp) is created using a voltage-controlled voltage source EAmp (an E
device). Node 1 is the plus input, node 2 is the minus input and node 4 is the output of the opamp.
Eamp 4 0 Value {V(1,2) * 1E6}
A voltage divider network provides negative feedback to the amplifier. The closed-loop gain of the opamp must be
at least 3, for oscillations to occur. This is because the Wien bridge attenuates the output by 1/3 at the frequency
of oscillation. The back-to-back Zener diodes limit the gain of the opamp, as the oscillations build, so that
saturation does not occur.
