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www.cadence.com 3 Allegro Design Authoring PCB Editor Integration The integration of Allegro Design Authoring with Allegro PCB Editor makes it the Schematic Editor of choice for all designers looking to increase productivity. The front-to-back flow automatically takes care of backannotation of pin, section, and component swapping in Allegro PCB Editor to Allegro Design Authoring sche- matics. Two-way cross-probing between Allegro PCB Editor and Allegro Design Authoring allows you to locate compo- nents in the schematic by highlighting the component in Allegro PCB Editor and vice versa. To help in the placement phase, you can place components in Allegro PCB Editor by selecting the components in the Allegro Design Authoring schematic can- vas. You can also place all components on an Allegro Design Authoring sche- matic page in a single step in Allegro PCB Editor. Using design differences, you can compare schematics and boards before transferring design information in either direction. With design association, you can backannotate terminators and bypass capacitors added directly to the board to the schematic. This allows logic design and signal integrity design to proceed in parallel. The Physical Viewer included with Allegro Design Authoring lets you view the Allegro PCB Editor. This is beneficial for viewing ECOs and other documenta- tion-related issues. Part Development Allegro Design Authoring solution includes Part Developer, which enables creation and validation of symbols and part data. Part Developer provides a powerful mix of functionality that includes the ability to quickly enter and manipulate data, split pins across multiple symbols and define visibility for power and ground pins. AMS Simulation Allegro Design Authoring is tightly inte- grated with Allegro AMS Simulator 210 for fluid analog simulation. You can con- figure schematic symbols to reference Spice simulator models and simulate the design from within the Allegro Design Authoring environment. You can also cross-probe between schematic and simu- lation environments to quickly locate and characterize design bugs. This provides a reliable, low-cost analog simulation and verification solution for Allegro Design Authoring customers on the Windows platform. At the other end of the spec- trum, Analog Workbench provides a high-end comprehensive analog design environment that is integrated with Allegro Design Authoring only on the UNIX platform. High-Speed Design Integration with Allegro Constraint Manager makes creating design intent quick and easy—it adds physical and electrical constraints that make communi- cation of constraints reliable. Integrating constraints with schematic creation makes capturing and communicating design intent to downstream processes very efficient and eliminates the risk of unnecessary prototype iterations. It also shortens the PCB implementation pro- cess by enabling a constraint-driven PCB design flow. The spreadsheet-like system allows you to capture all electrical constraints within the design database, eliminating the need to communicate constraints and design data separately. Advanced features include the ability to automatically extract, use, and override constraints from blocks added to the design. Constraint Manager presents constraints through several separate worksheets for different types of electrical constraints. It allows you to capture, manage, and vali- date the different rules in a hierarchical fashion. Constraint Manager enables you to group all of the high-speed constraints for a collection of signals to form an elec- trical constraint set (ECSet). This ECSet is then associated with all the nets in the group. Constraint Manager is integrated with both Allegro Design Authoring and the physical design tools, making it easy to capture and manage constraints dur- ing the logical design phase. At any point during the design phase, you can launch Constraint Manager to add, view, and manage high-speed constraints in forma- tion. As the rules are embedded in the design, the PCB layout designer can con- centrate on optimizing the physical layout for size, routability, and manufacturability, while the software automatically com- municates compliance with the engineer's performance requirements. RF Circuit Design Many of today's digital PCB systems include some circuitry that operates at radio frequencies. These blocks have special design requirements and are pre- dominantly designed and simulated with Agilent ADS (formerly Agilent EEsof). However, this block needs to be pres- ent on the same board along with other digital and analog circuitry. To enable this, Allegro Design Authoring and Allegro PCB Editor provide a flow to import RF blocks designed in Agilent ADS into the Cadence board design flow. Allegro PCB Editor and Allegro Design Authoring can automatically import the ADS physical layout and sche- matic through a robust interface. Once imported, the ADS design behaves like a module, with its components mapped to Allegro PCB Editor library parts. The imported module can be locked (to pre- vent editing) or unlocked (to allow edit- ing). Even if locked, the module still allows you to connect it with the rest of the design and assign constraints to the nest connected to the block. Multi-Style Design Creation The Allegro Design Authoring Multi-Style Option helps you create design intent for complex PCBs faster by letting you use the design style that matches the type of design. The ability to create different parts of the same design using differ- ent paradigms, individually, or as part of a team, allows you to capture designs faster. At the heart of the Multi-Style Option is a spreadsheet-like interface to create design intent. Suitable for large pin-count devices and backplane designs, it also allows you to reuse existing sub- sets of the design created in schemat- ics—power supply sections and analog/RF sections can be reused or integrated easily in the design. The Multi-Style Option also allows mul- tiple designers to work concurrently on a project. The intelligent design differ- ences engine allows teams to simultane- ously compare and reconcile changes when edits are made in logical and physi-

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