Issue link: https://resources.pcb.cadence.com/i/1188100
Design Challenges Beckhoff Automation Thorsten Viefhues, Senior Hardware Developer This design is completely new from scratch, because it is a new processor chip set with a different topology as it was used before. Processors with integrated CPU, memory and graphics have different pitch spacings, e. g. for power supply in the center and memory interfaces at the outside pins. "To fan out strobe signals of the DDR4 memories the differential pairs have to be routed in the center of the 17 mils gap between the pin field. We saved a lot of time using the snake routing feature of Allegro PCB Editor", said Thorsten Viefhues, Senior Hardware Developer at Beckhoff and responsible for the layout of the motherboard. In such a fan out, routing is no longer 45 degrees and all spacings have to be centered between pins with a constant spacing inside differential pairs to enable a good signal integrity. Floor planning of this new design took nearly 2 weeks and started already while schematics were not finished. With placement of major components and all connectors most of the area was covered. This placement was veri- fied with thermal analysis and mechanical integration. After placement was finalized, the entire layout could be completed in less than 8 weeks on a 12-layer stackup. Beckhoff internal isolated power supply for industrial PCs was reused from a library and adopted with small changes into this design. High speed serial interfaces were routed first to ensure same length at least for each byte. At signal speeds of 10 GBits for USB3.1 Gen2 and 6 GBits for SATA Gen3 and other PCIe Gen3 / 16 lanes, the dynamic and static phase tuning was a big challenge. For each 45 or 90 degree a length compen- sation has to be done following after length mismatch specification within 125 mils after the corner. This is a challenge in such a dense board and requires planning of interfaces before routing. Using constraint regions for various areas of the design and the support from PCB Editor to calculate electrical length for inner and outer layers helps to balance all constraints within constraint tolerance. Very helpful and essential for proper relativ length matching (e. g. DDR4 DRAM interface) when routing over different layers is that z-axis delay also factors into length calculation. Challenge for industrial PCs is that they have to be very reliable and robust in terms of EMI, signal and power integrity. There are thousands of rules that had to be observed in the design process and this can easily be managed in Allegro Constraint Manager. Real time design rule checks provide imme- diate feedback to the designer when there are violations of the rules and changes can be made instantaneous. For industrial PCs most of the constraints regarding signal and power integrity come from processor manufacturers. This infor- mation can be read into Allegro Constraint Manager and guides the designer during placement and layout routing process with real time design rule checks (DRC). About Beckhoff Beckhoff implements open automation sys- tems based on PC control technology. The product range covers industrial PCs, I/O and fieldbus components, drive technology, and automation software. Products that can be used as separate components or integrated into a complete and seamless control system are available for all industries, that are used worldwide in a wide variety of different applications, ranging from CNC-controlled machine tools to intelligent building auto- mation. www.beckhoff.com Photo credit: Beckhoff Automation GmbH & Co. KG Dynamic phase tuning per segment Beckhoff headquarters in Verl More information at: FlowCAD (Germany) Mozartstr. 2 85622 Feldkirchen / Munich, Germany +49 89 45637-770 info@FlowCAD.de FlowCAD