Issue link: https://resources.pcb.cadence.com/i/1180526
PSpice User Guide Digital device modeling October 2019 395 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. is, at the exact time of the digital transition). The values for these model parameters should be obtained by measuring the time it takes the analog output of the DtoA (with a nominal analog load attached) to change to the switching threshold after its digital input changes. If the switching time is larger than the propagation delay for an output, no warning is issued, and a delay of zero is used. When creating your own digital device models, you can create I/O models like these for the primitives you are using. We recommend that you save these in your own custom model library, which you can then configure for use with a given design. See the online PSpice Reference Guide for more information on units and defaults for these parameters. Note: The switching time parameters are not used when the output drives a digital node. Table 7-2 Digital I/O model parameters UIO model parameter Description INLD input load capacitance OUTLD output load capacitance DRVH output high level resistance DRVL output low level resistance DRVZ output Z-state leakage resistance INR input leakage resistance TSTOREMN minimum storage time for net to be simulated as a charge TPWRT pulse width rejection threshold AtoD1 (Level 1) name of AtoD interface subcircuit DtoA1 (Level 1) name of DtoA interface subcircuit AtoD2 (Level 2) name of AtoD interface subcircuit DtoA2 (Level 2) name of DtoA interface subcircuit AtoD3 (Level 3) name of AtoD interface subcircuit